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igc: Add set_rx_mode support
Add multicast addresses list to the MTA table. Implement basic Rx mode support. Add option for IPv6 address settings. Signed-off-by: Sasha Neftin <sasha.neftin@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
This commit is contained in:
Sasha Neftin
Jeff Kirsher
parent
f15bb6dde7
commit
7f839684c5
@ -402,4 +402,7 @@
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#define IGC_ADVTXD_TUCMD_L4T_TCP 0x00000800 /* L4 Packet Type of TCP */
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#define IGC_ADVTXD_TUCMD_L4T_SCTP 0x00001000 /* L4 packet TYPE of SCTP */
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/* Maximum size of the MTA register table in all supported adapters */
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#define MAX_MTA_REG 128
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#endif /* _IGC_DEFINES_H_ */
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@ -91,6 +91,7 @@ struct igc_mac_info {
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u16 mta_reg_count;
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u16 uta_reg_count;
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u32 mta_shadow[MAX_MTA_REG];
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u16 rar_entry_count;
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u8 forced_speed_duplex;
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@ -784,3 +784,107 @@ bool igc_enable_mng_pass_thru(struct igc_hw *hw)
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out:
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return ret_val;
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}
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/**
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* igc_hash_mc_addr - Generate a multicast hash value
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* @hw: pointer to the HW structure
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* @mc_addr: pointer to a multicast address
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*
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* Generates a multicast address hash value which is used to determine
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* the multicast filter table array address and new table value. See
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* igc_mta_set()
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**/
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static u32 igc_hash_mc_addr(struct igc_hw *hw, u8 *mc_addr)
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{
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u32 hash_value, hash_mask;
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u8 bit_shift = 0;
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/* Register count multiplied by bits per register */
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hash_mask = (hw->mac.mta_reg_count * 32) - 1;
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/* For a mc_filter_type of 0, bit_shift is the number of left-shifts
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* where 0xFF would still fall within the hash mask.
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*/
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while (hash_mask >> bit_shift != 0xFF)
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bit_shift++;
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/* The portion of the address that is used for the hash table
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* is determined by the mc_filter_type setting.
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* The algorithm is such that there is a total of 8 bits of shifting.
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* The bit_shift for a mc_filter_type of 0 represents the number of
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* left-shifts where the MSB of mc_addr[5] would still fall within
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* the hash_mask. Case 0 does this exactly. Since there are a total
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* of 8 bits of shifting, then mc_addr[4] will shift right the
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* remaining number of bits. Thus 8 - bit_shift. The rest of the
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* cases are a variation of this algorithm...essentially raising the
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* number of bits to shift mc_addr[5] left, while still keeping the
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* 8-bit shifting total.
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*
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* For example, given the following Destination MAC Address and an
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* MTA register count of 128 (thus a 4096-bit vector and 0xFFF mask),
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* we can see that the bit_shift for case 0 is 4. These are the hash
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* values resulting from each mc_filter_type...
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* [0] [1] [2] [3] [4] [5]
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* 01 AA 00 12 34 56
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* LSB MSB
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*
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* case 0: hash_value = ((0x34 >> 4) | (0x56 << 4)) & 0xFFF = 0x563
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* case 1: hash_value = ((0x34 >> 3) | (0x56 << 5)) & 0xFFF = 0xAC6
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* case 2: hash_value = ((0x34 >> 2) | (0x56 << 6)) & 0xFFF = 0x163
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* case 3: hash_value = ((0x34 >> 0) | (0x56 << 8)) & 0xFFF = 0x634
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*/
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switch (hw->mac.mc_filter_type) {
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default:
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case 0:
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break;
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case 1:
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bit_shift += 1;
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break;
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case 2:
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bit_shift += 2;
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break;
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case 3:
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bit_shift += 4;
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break;
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}
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hash_value = hash_mask & (((mc_addr[4] >> (8 - bit_shift)) |
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(((u16)mc_addr[5]) << bit_shift)));
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return hash_value;
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}
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/**
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* igc_update_mc_addr_list - Update Multicast addresses
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* @hw: pointer to the HW structure
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* @mc_addr_list: array of multicast addresses to program
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* @mc_addr_count: number of multicast addresses to program
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*
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* Updates entire Multicast Table Array.
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* The caller must have a packed mc_addr_list of multicast addresses.
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**/
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void igc_update_mc_addr_list(struct igc_hw *hw,
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u8 *mc_addr_list, u32 mc_addr_count)
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{
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u32 hash_value, hash_bit, hash_reg;
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int i;
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/* clear mta_shadow */
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memset(&hw->mac.mta_shadow, 0, sizeof(hw->mac.mta_shadow));
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/* update mta_shadow from mc_addr_list */
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for (i = 0; (u32)i < mc_addr_count; i++) {
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hash_value = igc_hash_mc_addr(hw, mc_addr_list);
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hash_reg = (hash_value >> 5) & (hw->mac.mta_reg_count - 1);
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hash_bit = hash_value & 0x1F;
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hw->mac.mta_shadow[hash_reg] |= BIT(hash_bit);
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mc_addr_list += ETH_ALEN;
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}
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/* replace the entire MTA table */
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for (i = hw->mac.mta_reg_count - 1; i >= 0; i--)
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array_wr32(IGC_MTA, i, hw->mac.mta_shadow[i]);
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wrfl();
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}
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@ -29,6 +29,8 @@ s32 igc_get_speed_and_duplex_copper(struct igc_hw *hw, u16 *speed,
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u16 *duplex);
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bool igc_enable_mng_pass_thru(struct igc_hw *hw);
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void igc_update_mc_addr_list(struct igc_hw *hw,
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u8 *mc_addr_list, u32 mc_addr_count);
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enum igc_mng_mode {
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igc_mng_mode_none = 0,
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@ -795,6 +795,44 @@ static int igc_set_mac(struct net_device *netdev, void *p)
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return 0;
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}
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/**
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* igc_write_mc_addr_list - write multicast addresses to MTA
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* @netdev: network interface device structure
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*
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* Writes multicast address list to the MTA hash table.
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* Returns: -ENOMEM on failure
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* 0 on no addresses written
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* X on writing X addresses to MTA
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**/
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static int igc_write_mc_addr_list(struct net_device *netdev)
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{
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struct igc_adapter *adapter = netdev_priv(netdev);
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struct igc_hw *hw = &adapter->hw;
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struct netdev_hw_addr *ha;
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u8 *mta_list;
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int i;
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if (netdev_mc_empty(netdev)) {
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/* nothing to program, so clear mc list */
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igc_update_mc_addr_list(hw, NULL, 0);
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return 0;
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}
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mta_list = kcalloc(netdev_mc_count(netdev), 6, GFP_ATOMIC);
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if (!mta_list)
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return -ENOMEM;
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/* The shared function expects a packed array of only addresses. */
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i = 0;
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netdev_for_each_mc_addr(ha, netdev)
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memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
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igc_update_mc_addr_list(hw, mta_list, i);
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kfree(mta_list);
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return netdev_mc_count(netdev);
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}
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static void igc_tx_ctxtdesc(struct igc_ring *tx_ring,
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struct igc_tx_buffer *first,
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u32 vlan_macip_lens, u32 type_tucmd,
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@ -2518,6 +2556,110 @@ int igc_del_mac_steering_filter(struct igc_adapter *adapter,
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IGC_MAC_STATE_QUEUE_STEERING | flags);
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}
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/* Add a MAC filter for 'addr' directing matching traffic to 'queue',
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* 'flags' is used to indicate what kind of match is made, match is by
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* default for the destination address, if matching by source address
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* is desired the flag IGC_MAC_STATE_SRC_ADDR can be used.
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*/
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static int igc_add_mac_filter(struct igc_adapter *adapter,
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const u8 *addr, const u8 queue)
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{
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struct igc_hw *hw = &adapter->hw;
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int rar_entries = hw->mac.rar_entry_count;
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int i;
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if (is_zero_ether_addr(addr))
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return -EINVAL;
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/* Search for the first empty entry in the MAC table.
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* Do not touch entries at the end of the table reserved for the VF MAC
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* addresses.
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*/
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for (i = 0; i < rar_entries; i++) {
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if (!igc_mac_entry_can_be_used(&adapter->mac_table[i],
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addr, 0))
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continue;
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ether_addr_copy(adapter->mac_table[i].addr, addr);
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adapter->mac_table[i].queue = queue;
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adapter->mac_table[i].state |= IGC_MAC_STATE_IN_USE;
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igc_rar_set_index(adapter, i);
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return i;
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}
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return -ENOSPC;
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}
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/* Remove a MAC filter for 'addr' directing matching traffic to
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* 'queue', 'flags' is used to indicate what kind of match need to be
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* removed, match is by default for the destination address, if
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* matching by source address is to be removed the flag
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* IGC_MAC_STATE_SRC_ADDR can be used.
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*/
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static int igc_del_mac_filter(struct igc_adapter *adapter,
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const u8 *addr, const u8 queue)
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{
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struct igc_hw *hw = &adapter->hw;
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int rar_entries = hw->mac.rar_entry_count;
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int i;
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if (is_zero_ether_addr(addr))
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return -EINVAL;
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/* Search for matching entry in the MAC table based on given address
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* and queue. Do not touch entries at the end of the table reserved
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* for the VF MAC addresses.
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*/
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for (i = 0; i < rar_entries; i++) {
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if (!(adapter->mac_table[i].state & IGC_MAC_STATE_IN_USE))
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continue;
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if (adapter->mac_table[i].state != 0)
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continue;
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if (adapter->mac_table[i].queue != queue)
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continue;
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if (!ether_addr_equal(adapter->mac_table[i].addr, addr))
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continue;
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/* When a filter for the default address is "deleted",
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* we return it to its initial configuration
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*/
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if (adapter->mac_table[i].state & IGC_MAC_STATE_DEFAULT) {
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adapter->mac_table[i].state =
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IGC_MAC_STATE_DEFAULT | IGC_MAC_STATE_IN_USE;
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adapter->mac_table[i].queue = 0;
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} else {
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adapter->mac_table[i].state = 0;
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adapter->mac_table[i].queue = 0;
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memset(adapter->mac_table[i].addr, 0, ETH_ALEN);
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}
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igc_rar_set_index(adapter, i);
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return 0;
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}
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return -ENOENT;
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}
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static int igc_uc_sync(struct net_device *netdev, const unsigned char *addr)
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{
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struct igc_adapter *adapter = netdev_priv(netdev);
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int ret;
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ret = igc_add_mac_filter(adapter, addr, adapter->num_rx_queues);
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return min_t(int, ret, 0);
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}
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static int igc_uc_unsync(struct net_device *netdev, const unsigned char *addr)
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{
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struct igc_adapter *adapter = netdev_priv(netdev);
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igc_del_mac_filter(adapter, addr, adapter->num_rx_queues);
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return 0;
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}
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/**
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* igc_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
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* @netdev: network interface device structure
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@ -2529,6 +2671,44 @@ int igc_del_mac_steering_filter(struct igc_adapter *adapter,
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*/
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static void igc_set_rx_mode(struct net_device *netdev)
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{
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struct igc_adapter *adapter = netdev_priv(netdev);
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struct igc_hw *hw = &adapter->hw;
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u32 rctl = 0, rlpml = MAX_JUMBO_FRAME_SIZE;
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int count;
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/* Check for Promiscuous and All Multicast modes */
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if (netdev->flags & IFF_PROMISC) {
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rctl |= IGC_RCTL_UPE | IGC_RCTL_MPE;
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} else {
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if (netdev->flags & IFF_ALLMULTI) {
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rctl |= IGC_RCTL_MPE;
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} else {
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/* Write addresses to the MTA, if the attempt fails
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* then we should just turn on promiscuous mode so
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* that we can at least receive multicast traffic
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*/
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count = igc_write_mc_addr_list(netdev);
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if (count < 0)
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rctl |= IGC_RCTL_MPE;
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}
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}
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/* Write addresses to available RAR registers, if there is not
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* sufficient space to store all the addresses then enable
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* unicast promiscuous mode
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*/
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if (__dev_uc_sync(netdev, igc_uc_sync, igc_uc_unsync))
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rctl |= IGC_RCTL_UPE;
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/* update state of unicast and multicast */
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rctl |= rd32(IGC_RCTL) & ~(IGC_RCTL_UPE | IGC_RCTL_MPE);
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wr32(IGC_RCTL, rctl);
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#if (PAGE_SIZE < 8192)
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if (adapter->max_frame_size <= IGC_MAX_FRAME_BUILD_SKB)
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rlpml = IGC_MAX_FRAME_BUILD_SKB;
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#endif
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wr32(IGC_RLPML, rlpml);
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}
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/**
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@ -3982,6 +4162,7 @@ static const struct net_device_ops igc_netdev_ops = {
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.ndo_open = igc_open,
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.ndo_stop = igc_close,
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.ndo_start_xmit = igc_xmit_frame,
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.ndo_set_rx_mode = igc_set_rx_mode,
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.ndo_set_mac_address = igc_set_mac,
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.ndo_change_mtu = igc_change_mtu,
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.ndo_get_stats = igc_get_stats,
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