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mmc: mediatek: make hs400_tune_response only for mt8173
the origin design of hs400_tune_response is for mt8173 because of mt8173 has a special design. for doing that, we add a new member "compatible", by now it's only for mt8173. Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com> Tested-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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@ -300,6 +300,7 @@ struct msdc_save_para {
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struct mtk_mmc_compatible {
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u8 clk_div_bits;
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bool hs400_tune; /* only used for MT8173 */
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};
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struct msdc_tune_para {
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@ -360,18 +361,22 @@ struct msdc_host {
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static const struct mtk_mmc_compatible mt8135_compat = {
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.clk_div_bits = 8,
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.hs400_tune = false,
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};
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static const struct mtk_mmc_compatible mt8173_compat = {
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.clk_div_bits = 8,
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.hs400_tune = true,
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};
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static const struct mtk_mmc_compatible mt2701_compat = {
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.clk_div_bits = 12,
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.hs400_tune = false,
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};
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static const struct mtk_mmc_compatible mt2712_compat = {
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.clk_div_bits = 12,
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.hs400_tune = false,
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};
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static const struct of_device_id msdc_of_ids[] = {
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@ -666,7 +671,8 @@ static void msdc_set_mclk(struct msdc_host *host, unsigned char timing, u32 hz)
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host->base + PAD_CMD_TUNE);
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}
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if (timing == MMC_TIMING_MMC_HS400)
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if (timing == MMC_TIMING_MMC_HS400 &&
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host->dev_comp->hs400_tune)
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sdr_set_field(host->base + PAD_CMD_TUNE,
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MSDC_PAD_TUNE_CMDRRDLY,
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host->hs400_cmd_int_delay);
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@ -1594,7 +1600,8 @@ static int msdc_execute_tuning(struct mmc_host *mmc, u32 opcode)
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struct msdc_host *host = mmc_priv(mmc);
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int ret;
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if (host->hs400_mode)
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if (host->hs400_mode &&
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host->dev_comp->hs400_tune)
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ret = hs400_tune_response(mmc, opcode);
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else
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ret = msdc_tune_response(mmc, opcode);
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