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dt-bindings: dma: Convert UniPhier MIO DMA controller to json-schema

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Convert the UniPhier MIO (Media I/O) DMA controller binding to DT
schema format.

While I was here, I added the resets property.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Rob Herring <robh@kernel.org>
This commit is contained in:
Masahiro Yamada 2020-02-22 20:20:42 +09:00 committed by Rob Herring
parent 6bb984a3ce
commit 7ebec90559
2 changed files with 63 additions and 25 deletions
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63
Documentation/devicetree/bindings/dma/socionext,uniphier-mio-dmac.yaml Normal file
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# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/dma/socionext,uniphier-mio-dmac.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: UniPhier Media IO DMA controller
description: |
This works as an external DMA engine for SD/eMMC controllers etc.
found in UniPhier LD4, Pro4, sLD8 SoCs.
maintainers:
- Masahiro Yamada <yamada.masahiro@socionext.com>
allOf:
- $ref: "dma-controller.yaml#"
properties:
compatible:
const: socionext,uniphier-mio-dmac
reg:
maxItems: 1
interrupts:
description: |
A list of interrupt specifiers associated with the DMA channels.
The number of interrupt lines is SoC-dependent.
clocks:
maxItems: 1
resets:
maxItems: 1
'#dma-cells':
description: The single cell represents the channel index.
const: 1
required:
- compatible
- reg
- interrupts
- clocks
- '#dma-cells'
additionalProperties: false
examples:
- |
// In the example below, "interrupts = <0 68 4>, <0 68 4>, ..." is not a
// typo. The first two channels share a single interrupt line.
dmac: dma-controller@5a000000 {
compatible = "socionext,uniphier-mio-dmac";
reg = <0x5a000000 0x1000>;
interrupts = <0 68 4>, <0 68 4>, <0 69 4>, <0 70 4>,
<0 71 4>, <0 72 4>, <0 73 4>, <0 74 4>;
clocks = <&mio_clk 7>;
resets = <&mio_rst 7>;
#dma-cells = <1>;
};

25
Documentation/devicetree/bindings/dma/uniphier-mio-dmac.txt
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UniPhier Media IO DMA controller
This works as an external DMA engine for SD/eMMC controllers etc.
found in UniPhier LD4, Pro4, sLD8 SoCs.
Required properties:
- compatible: should be "socionext,uniphier-mio-dmac".
- reg: offset and length of the register set for the device.
- interrupts: a list of interrupt specifiers associated with the DMA channels.
- clocks: a single clock specifier.
- #dma-cells: should be <1>. The single cell represents the channel index.
Example:
dmac: dma-controller@5a000000 {
compatible = "socionext,uniphier-mio-dmac";
reg = <0x5a000000 0x1000>;
interrupts = <0 68 4>, <0 68 4>, <0 69 4>, <0 70 4>,
<0 71 4>, <0 72 4>, <0 73 4>, <0 74 4>;
clocks = <&mio_clk 7>;
#dma-cells = <1>;
};
Note:
In the example above, "interrupts = <0 68 4>, <0 68 4>, ..." is not a typo.
The first two channels share a single interrupt line.