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drm/i915: Set adjustment to zero on Up/Down interrupts if freq is already max/min

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When we reach the user's RPS limits, stop requesting an adjustment. Even
though we will clamp the requested frequency later, we rely on interrupt
masking to disable further adjustments in the same direction. Even
though it is unlikely (one scenario is a bug in the driver, another is
careful manipulation through the uAPI) if we keep exponentially
increasing the adjustment value, it will wrap and cause a negative
adjustment.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Sagar Arun Kamble <sagar.a.kamble@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1484884104-28134-2-git-send-email-sagar.a.kamble@intel.com
This commit is contained in:
Sagar Arun Kamble 2017-01-20 09:18:24 +05:30 committed by Chris Wilson
parent e96128235b
commit 7e79a6836c
1 changed files with 6 additions and 0 deletions
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6
drivers/gpu/drm/i915/i915_irq.c
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@ -1170,6 +1170,9 @@ static void gen6_pm_rps_work(struct work_struct *work)
adj *= 2; adj *= 2;
else /* CHV needs even encode values */ else /* CHV needs even encode values */
adj = IS_CHERRYVIEW(dev_priv) ? 2 : 1; adj = IS_CHERRYVIEW(dev_priv) ? 2 : 1;
if (new_delay >= dev_priv->rps.max_freq_softlimit)
adj = 0;
/* /*
* For better performance, jump directly * For better performance, jump directly
* to RPe if we're below it. * to RPe if we're below it.
@ -1191,6 +1194,9 @@ static void gen6_pm_rps_work(struct work_struct *work)
adj *= 2; adj *= 2;
else /* CHV needs even encode values */ else /* CHV needs even encode values */
adj = IS_CHERRYVIEW(dev_priv) ? -2 : -1; adj = IS_CHERRYVIEW(dev_priv) ? -2 : -1;
if (new_delay <= dev_priv->rps.min_freq_softlimit)
adj = 0;
} else { /* unknown event */ } else { /* unknown event */
adj = 0; adj = 0;
} }