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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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x86/kvm/mmu: check if tdp/shadow MMU reconfiguration is needed
MMU reconfiguration in init_kvm_tdp_mmu()/kvm_init_shadow_mmu() can be avoided if the source data used to configure it didn't change; enhance MMU extended role with the required fields and consolidate common code in kvm_calc_mmu_role_common(). Signed-off-by: Vitaly Kuznetsov <vkuznets@redhat.com> Reviewed-by: Sean Christopherson <sean.j.christopherson@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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@ -293,10 +293,12 @@ union kvm_mmu_extended_role {
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struct {
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unsigned int valid:1;
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unsigned int execonly:1;
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unsigned int cr0_pg:1;
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unsigned int cr4_pse:1;
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unsigned int cr4_pke:1;
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unsigned int cr4_smap:1;
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unsigned int cr4_smep:1;
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unsigned int cr4_la57:1;
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};
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};
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@ -4728,27 +4728,46 @@ static union kvm_mmu_extended_role kvm_calc_mmu_role_ext(struct kvm_vcpu *vcpu)
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{
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union kvm_mmu_extended_role ext = {0};
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ext.cr0_pg = !!is_paging(vcpu);
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ext.cr4_smep = !!kvm_read_cr4_bits(vcpu, X86_CR4_SMEP);
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ext.cr4_smap = !!kvm_read_cr4_bits(vcpu, X86_CR4_SMAP);
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ext.cr4_pse = !!is_pse(vcpu);
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ext.cr4_pke = !!kvm_read_cr4_bits(vcpu, X86_CR4_PKE);
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ext.cr4_la57 = !!kvm_read_cr4_bits(vcpu, X86_CR4_LA57);
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ext.valid = 1;
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return ext;
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}
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static union kvm_mmu_page_role
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kvm_calc_tdp_mmu_root_page_role(struct kvm_vcpu *vcpu)
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static union kvm_mmu_role kvm_calc_mmu_role_common(struct kvm_vcpu *vcpu,
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bool base_only)
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{
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union kvm_mmu_page_role role = {0};
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union kvm_mmu_role role = {0};
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role.guest_mode = is_guest_mode(vcpu);
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role.smm = is_smm(vcpu);
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role.ad_disabled = (shadow_accessed_mask == 0);
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role.level = kvm_x86_ops->get_tdp_level(vcpu);
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role.direct = true;
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role.access = ACC_ALL;
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role.base.access = ACC_ALL;
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role.base.nxe = !!is_nx(vcpu);
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role.base.cr4_pae = !!is_pae(vcpu);
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role.base.cr0_wp = is_write_protection(vcpu);
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role.base.smm = is_smm(vcpu);
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role.base.guest_mode = is_guest_mode(vcpu);
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if (base_only)
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return role;
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role.ext = kvm_calc_mmu_role_ext(vcpu);
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return role;
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}
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static union kvm_mmu_role
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kvm_calc_tdp_mmu_root_page_role(struct kvm_vcpu *vcpu, bool base_only)
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{
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union kvm_mmu_role role = kvm_calc_mmu_role_common(vcpu, base_only);
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role.base.ad_disabled = (shadow_accessed_mask == 0);
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role.base.level = kvm_x86_ops->get_tdp_level(vcpu);
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role.base.direct = true;
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return role;
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}
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@ -4756,9 +4775,14 @@ kvm_calc_tdp_mmu_root_page_role(struct kvm_vcpu *vcpu)
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static void init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
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{
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struct kvm_mmu *context = vcpu->arch.mmu;
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union kvm_mmu_role new_role =
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kvm_calc_tdp_mmu_root_page_role(vcpu, false);
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context->mmu_role.base.word = mmu_base_role_mask.word &
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kvm_calc_tdp_mmu_root_page_role(vcpu).word;
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new_role.base.word &= mmu_base_role_mask.word;
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if (new_role.as_u64 == context->mmu_role.as_u64)
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return;
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context->mmu_role.as_u64 = new_role.as_u64;
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context->page_fault = tdp_page_fault;
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context->sync_page = nonpaging_sync_page;
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context->invlpg = nonpaging_invlpg;
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@ -4798,29 +4822,23 @@ static void init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
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reset_tdp_shadow_zero_bits_mask(vcpu, context);
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}
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static union kvm_mmu_page_role
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kvm_calc_shadow_mmu_root_page_role(struct kvm_vcpu *vcpu)
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static union kvm_mmu_role
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kvm_calc_shadow_mmu_root_page_role(struct kvm_vcpu *vcpu, bool base_only)
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{
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union kvm_mmu_page_role role = {0};
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bool smep = kvm_read_cr4_bits(vcpu, X86_CR4_SMEP);
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bool smap = kvm_read_cr4_bits(vcpu, X86_CR4_SMAP);
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union kvm_mmu_role role = kvm_calc_mmu_role_common(vcpu, base_only);
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role.nxe = is_nx(vcpu);
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role.cr4_pae = !!is_pae(vcpu);
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role.cr0_wp = is_write_protection(vcpu);
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role.smep_andnot_wp = smep && !is_write_protection(vcpu);
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role.smap_andnot_wp = smap && !is_write_protection(vcpu);
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role.guest_mode = is_guest_mode(vcpu);
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role.smm = is_smm(vcpu);
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role.direct = !is_paging(vcpu);
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role.access = ACC_ALL;
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role.base.smep_andnot_wp = role.ext.cr4_smep &&
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!is_write_protection(vcpu);
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role.base.smap_andnot_wp = role.ext.cr4_smap &&
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!is_write_protection(vcpu);
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role.base.direct = !is_paging(vcpu);
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if (!is_long_mode(vcpu))
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role.level = PT32E_ROOT_LEVEL;
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role.base.level = PT32E_ROOT_LEVEL;
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else if (is_la57_mode(vcpu))
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role.level = PT64_ROOT_5LEVEL;
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role.base.level = PT64_ROOT_5LEVEL;
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else
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role.level = PT64_ROOT_4LEVEL;
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role.base.level = PT64_ROOT_4LEVEL;
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return role;
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}
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@ -4828,6 +4846,12 @@ kvm_calc_shadow_mmu_root_page_role(struct kvm_vcpu *vcpu)
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void kvm_init_shadow_mmu(struct kvm_vcpu *vcpu)
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{
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struct kvm_mmu *context = vcpu->arch.mmu;
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union kvm_mmu_role new_role =
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kvm_calc_shadow_mmu_root_page_role(vcpu, false);
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new_role.base.word &= mmu_base_role_mask.word;
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if (new_role.as_u64 == context->mmu_role.as_u64)
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return;
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if (!is_paging(vcpu))
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nonpaging_init_context(vcpu, context);
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@ -4838,8 +4862,7 @@ void kvm_init_shadow_mmu(struct kvm_vcpu *vcpu)
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else
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paging32_init_context(vcpu, context);
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context->mmu_role.base.word = mmu_base_role_mask.word &
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kvm_calc_shadow_mmu_root_page_role(vcpu).word;
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context->mmu_role.as_u64 = new_role.as_u64;
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reset_shadow_zero_bits_mask(vcpu, context);
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}
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EXPORT_SYMBOL_GPL(kvm_init_shadow_mmu);
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@ -4977,10 +5000,14 @@ EXPORT_SYMBOL_GPL(kvm_init_mmu);
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static union kvm_mmu_page_role
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kvm_mmu_calc_root_page_role(struct kvm_vcpu *vcpu)
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{
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union kvm_mmu_role role;
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if (tdp_enabled)
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return kvm_calc_tdp_mmu_root_page_role(vcpu);
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role = kvm_calc_tdp_mmu_root_page_role(vcpu, true);
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else
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return kvm_calc_shadow_mmu_root_page_role(vcpu);
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role = kvm_calc_shadow_mmu_root_page_role(vcpu, true);
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return role.base;
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}
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void kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
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