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drm/i915: don't call ironlake_enable_pch_pll on lpt_pch_enable

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This is just wrong. The lpt_program_iclkip should disable the PCH
pixel clocks (and yes, we plan to rename it later).

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
This commit is contained in:
Paulo Zanoni 2012-10-31 18:12:39 -02:00 committed by Daniel Vetter
parent b6b4e185a7
commit 7cbfd06530
1 changed files with 0 additions and 9 deletions
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9
drivers/gpu/drm/i915/intel_display.c
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@ -3181,15 +3181,6 @@ static void lpt_pch_enable(struct drm_crtc *crtc)
/* For PCH output, training FDI link */
dev_priv->display.fdi_link_train(crtc);
/* XXX: pch pll's can be enabled any time before we enable the PCH
* transcoder, and we actually should do this to not upset any PCH
* transcoder that already use the clock when we share it.
*
* Note that enable_pch_pll tries to do the right thing, but get_pch_pll
* unconditionally resets the pll - we need that to have the right LVDS
* enable sequence. */
ironlake_enable_pch_pll(intel_crtc);
lpt_program_iclkip(crtc);
/* set transcoder timing, panel must allow it */