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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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arm64: dts: qcom: msm8994: Modernize the DTS style
Following changes have been made:
- remove name, compatible and msm-id
- wrap clocks in clocks{}
- order nodes by name and by address
- clock_gcc -> gcc
- msmgpio -> tlmm
- qcom,smem -> smem
- remove unit-address from smem
- retire msm8994-pins.dtsi
- add some of the missing pins
- make comments C-style
Signed-off-by: Konrad Dybcio <konradybcio@gmail.com>
Link: https://lore.kernel.org/r/20200623224813.297077-2-konradybcio@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
This commit is contained in:
Konrad Dybcio
Bjorn Andersson
parent
23a8903785
commit
7c865b09b0
@ -1,30 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
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*/
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&msmgpio {
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blsp1_uart2_default: blsp1_uart2_default {
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pinmux {
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function = "blsp_uart2";
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pins = "gpio4", "gpio5";
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};
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pinconf {
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pins = "gpio4", "gpio5";
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drive-strength = <16>;
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bias-disable;
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};
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};
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blsp1_uart2_sleep: blsp1_uart2_sleep {
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pinmux {
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function = "gpio";
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pins = "gpio4", "gpio5";
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};
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pinconf {
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pins = "gpio4", "gpio5";
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drive-strength = <2>;
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bias-pull-down;
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};
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};
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};
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@ -6,12 +6,6 @@
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#include <dt-bindings/clock/qcom,gcc-msm8994.h>
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/ {
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model = "Qualcomm Technologies, Inc. MSM 8994";
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compatible = "qcom,msm8994";
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// msm-id and pmic-id are required by bootloader for
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// proper selection of dt blob
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qcom,msm-id = <207 0x20000>;
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qcom,pmic-id = <0x10009 0x1000A 0x0 0x0>;
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interrupt-parent = <&intc>;
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#address-cells = <2>;
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@ -19,6 +13,20 @@ / {
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chosen { };
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clocks {
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xo_board: xo_board {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <19200000>;
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};
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sleep_clk: sleep_clk {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <32768>;
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};
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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@ -42,12 +50,27 @@ L2_0: l2-cache {
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};
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};
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timer {
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compatible = "arm,armv8-timer";
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interrupts = <1 2 0xff08>,
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<1 3 0xff08>,
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<1 4 0xff08>,
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<1 1 0xff08>;
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memory {
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device_type = "memory";
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/* We expect the bootloader to fill in the reg */
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reg = <0 0 0 0>;
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};
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reserved-memory {
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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smem_mem: smem_region@6a00000 {
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reg = <0x0 0x6a00000 0x0 0x200000>;
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no-map;
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};
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};
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smem {
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compatible = "qcom,smem";
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memory-region = <&smem_mem>;
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hwlocks = <&tcsr_mutex 3>;
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};
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soc: soc {
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@ -62,7 +85,7 @@ intc: interrupt-controller@f9000000 {
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interrupt-controller;
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#interrupt-cells = <3>;
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reg = <0xf9000000 0x1000>,
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<0xf9002000 0x1000>;
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<0xf9002000 0x1000>;
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};
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timer@f9020000 {
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@ -123,30 +146,27 @@ frame@f9028000 {
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};
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};
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restart@fc4ab000 {
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compatible = "qcom,pshold";
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reg = <0xfc4ab000 0x4>;
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};
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msmgpio: pinctrl@fd510000 {
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compatible = "qcom,msm8994-pinctrl";
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reg = <0xfd510000 0x4000>;
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interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
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gpio-controller;
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gpio-ranges = <&msmgpio 0 0 146>;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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blsp1_uart2: serial@f991e000 {
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compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
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reg = <0xf991e000 0x1000>;
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interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
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status = "disabled";
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clock-names = "core", "iface";
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clocks = <&clock_gcc GCC_BLSP1_UART2_APPS_CLK>,
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<&clock_gcc GCC_BLSP1_AHB_CLK>;
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clocks = <&gcc GCC_BLSP1_UART2_APPS_CLK>,
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<&gcc GCC_BLSP1_AHB_CLK>;
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};
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gcc: clock-controller@fc400000 {
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compatible = "qcom,gcc-msm8994";
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#clock-cells = <1>;
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#reset-cells = <1>;
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#power-domain-cells = <1>;
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reg = <0xfc400000 0x2000>;
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};
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restart@fc4ab000 {
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compatible = "qcom,pshold";
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reg = <0xfc4ab000 0x4>;
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};
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tcsr_mutex_regs: syscon@fd484000 {
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@ -154,41 +174,181 @@ tcsr_mutex_regs: syscon@fd484000 {
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reg = <0xfd484000 0x2000>;
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};
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clock_gcc: clock-controller@fc400000 {
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compatible = "qcom,gcc-msm8994";
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#clock-cells = <1>;
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#reset-cells = <1>;
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#power-domain-cells = <1>;
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reg = <0xfc400000 0x2000>;
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};
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};
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tlmm: pinctrl@fd510000 {
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compatible = "qcom,msm8994-pinctrl";
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reg = <0xfd510000 0x4000>;
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interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
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gpio-controller;
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gpio-ranges = <&tlmm 0 0 146>;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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memory {
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device_type = "memory";
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// We expect the bootloader to fill in the reg
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reg = <0 0 0 0>;
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};
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blsp1_uart2_default: blsp1-uart2-default {
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function = "blsp_uart2";
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pins = "gpio4", "gpio5";
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drive-strength = <16>;
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bias-disable;
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};
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xo_board: xo_board {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <19200000>;
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};
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blsp1_uart2_sleep: blsp1-uart2-sleep {
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function = "gpio";
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pins = "gpio4", "gpio5";
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drive-strength = <2>;
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bias-pull-down;
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};
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sleep_clk: sleep_clk {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <32768>;
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};
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blsp2_uart2_default: blsp2-uart2-default {
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function = "blsp_uart8";
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pins = "gpio45", "gpio46";
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drive-strength = <2>;
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bias-disable;
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};
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reserved-memory {
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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blsp2_uart2_sleep: blsp2-uart2-sleep {
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function = "gpio";
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pins = "gpio45", "gpio46";
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drive-strength = <2>;
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bias-pull-down;
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};
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smem_mem: smem_region@6a00000 {
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reg = <0x0 0x6a00000 0x0 0x200000>;
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no-map;
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i2c1_default: i2c1-default {
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function = "blsp_i2c1";
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pins = "gpio2", "gpio3";
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drive-strength = <2>;
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bias-disable;
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};
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i2c1_sleep: i2c1-sleep {
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function = "gpio";
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pins = "gpio2", "gpio3";
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drive-strength = <2>;
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bias-disable;
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};
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i2c2_default: i2c2-default {
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function = "blsp_i2c2";
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pins = "gpio6", "gpio7";
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drive-strength = <2>;
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bias-disable;
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};
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i2c2_sleep: i2c2-sleep {
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function = "gpio";
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pins = "gpio6", "gpio7";
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drive-strength = <2>;
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bias-disable;
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};
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i2c4_default: i2c4-default {
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function = "blsp_i2c4";
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pins = "gpio19", "gpio20";
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drive-strength = <2>;
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bias-disable;
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};
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i2c4_sleep: i2c4-sleep {
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function = "gpio";
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pins = "gpio19", "gpio20";
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drive-strength = <2>;
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bias-pull-down;
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input-enable;
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};
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i2c5_default: i2c5-default {
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function = "blsp_i2c5";
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pins = "gpio23", "gpio24";
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drive-strength = <2>;
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bias-disable;
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};
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i2c5_sleep: i2c5-sleep {
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function = "gpio";
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pins = "gpio23", "gpio24";
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drive-strength = <2>;
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bias-disable;
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};
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i2c6_default: i2c6-default {
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function = "blsp_i2c6";
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pins = "gpio28", "gpio27";
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drive-strength = <2>;
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bias-disable;
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};
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i2c6_sleep: i2c6-sleep {
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function = "gpio";
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pins = "gpio28", "gpio27";
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drive-strength = <2>;
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bias-disable;
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};
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blsp1_spi0_default: blsp1-spi0-default {
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default {
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function = "blsp_spi1";
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pins = "gpio0", "gpio1", "gpio3";
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drive-strength = <10>;
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bias-pull-down;
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};
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cs {
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function = "gpio";
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pins = "gpio8";
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drive-strength = <2>;
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bias-disable;
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};
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};
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blsp1_spi0_sleep: blsp1-spi0-sleep {
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pins = "gpio0", "gpio1", "gpio3";
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drive-strength = <2>;
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bias-disable;
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};
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sdc1_clk_on: clk-on {
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pins = "sdc1_clk";
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bias-disable;
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drive-strength = <16>;
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};
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sdc1_clk_off: clk-off {
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pins = "sdc1_clk";
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bias-disable;
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drive-strength = <2>;
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};
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sdc1_cmd_on: cmd-on {
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pins = "sdc1_cmd";
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bias-pull-up;
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drive-strength = <8>;
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};
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sdc1_cmd_off: cmd-off {
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pins = "sdc1_cmd";
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bias-pull-up;
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drive-strength = <2>;
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};
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sdc1_data_on: data-on {
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pins = "sdc1_data";
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bias-pull-up;
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drive-strength = <8>;
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};
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sdc1_data_off: data-off {
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pins = "sdc1_data";
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bias-pull-up;
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drive-strength = <2>;
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};
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sdc1_rclk_on: rclk-on {
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pins = "sdc1_rclk";
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bias-pull-down;
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};
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sdc1_rclk_off: rclk-off {
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pins = "sdc1_rclk";
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bias-pull-down;
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};
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};
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};
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@ -198,12 +358,12 @@ tcsr_mutex: hwlock {
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#hwlock-cells = <1>;
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};
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qcom,smem@6a00000 {
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compatible = "qcom,smem";
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memory-region = <&smem_mem>;
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hwlocks = <&tcsr_mutex 3>;
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timer {
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compatible = "arm,armv8-timer";
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interrupts = <GIC_PPI 2 0xff08>,
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<GIC_PPI 3 0xff08>,
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<GIC_PPI 4 0xff08>,
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<GIC_PPI 1 0xff08>;
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};
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};
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#include "msm8994-pins.dtsi"
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