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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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regmap: irq: add support for chips who have separate unmask registers
Some chips have separate unmask registers from mask registers for some consideration of concurrency SMP write performance. And this patch adds a flag for it. An user will be CSR SiRFSoC ARM chips. Signed-off-by: Guo Zeng <Guo.Zeng@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -63,6 +63,7 @@ static void regmap_irq_sync_unlock(struct irq_data *data)
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struct regmap *map = d->map;
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int i, ret;
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u32 reg;
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u32 unmask_offset;
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if (d->chip->runtime_pm) {
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ret = pm_runtime_get_sync(map->dev);
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@ -79,12 +80,28 @@ static void regmap_irq_sync_unlock(struct irq_data *data)
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for (i = 0; i < d->chip->num_regs; i++) {
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reg = d->chip->mask_base +
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(i * map->reg_stride * d->irq_reg_stride);
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if (d->chip->mask_invert)
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if (d->chip->mask_invert) {
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ret = regmap_update_bits(d->map, reg,
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d->mask_buf_def[i], ~d->mask_buf[i]);
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else
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} else if (d->chip->unmask_base) {
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/* set mask with mask_base register */
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ret = regmap_update_bits(d->map, reg,
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d->mask_buf_def[i], ~d->mask_buf[i]);
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if (ret < 0)
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dev_err(d->map->dev,
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"Failed to sync unmasks in %x\n",
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reg);
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unmask_offset = d->chip->unmask_base -
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d->chip->mask_base;
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/* clear mask with unmask_base register */
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ret = regmap_update_bits(d->map,
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reg + unmask_offset,
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d->mask_buf_def[i],
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d->mask_buf[i]);
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} else {
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ret = regmap_update_bits(d->map, reg,
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d->mask_buf_def[i], d->mask_buf[i]);
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}
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if (ret != 0)
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dev_err(d->map->dev, "Failed to sync masks in %x\n",
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reg);
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@ -339,6 +356,7 @@ int regmap_add_irq_chip(struct regmap *map, int irq, int irq_flags,
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int i;
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int ret = -ENOMEM;
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u32 reg;
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u32 unmask_offset;
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if (chip->num_regs <= 0)
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return -EINVAL;
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@ -420,7 +438,14 @@ int regmap_add_irq_chip(struct regmap *map, int irq, int irq_flags,
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if (chip->mask_invert)
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ret = regmap_update_bits(map, reg,
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d->mask_buf[i], ~d->mask_buf[i]);
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else
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else if (d->chip->unmask_base) {
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unmask_offset = d->chip->unmask_base -
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d->chip->mask_base;
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ret = regmap_update_bits(d->map,
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reg + unmask_offset,
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d->mask_buf[i],
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d->mask_buf[i]);
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} else
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ret = regmap_update_bits(map, reg,
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d->mask_buf[i], d->mask_buf[i]);
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if (ret != 0) {
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@ -800,6 +800,8 @@ struct regmap_irq {
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*
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* @status_base: Base status register address.
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* @mask_base: Base mask register address.
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* @unmask_base: Base unmask register address. for chips who have
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* separate mask and unmask registers
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* @ack_base: Base ack address. If zero then the chip is clear on read.
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* Using zero value is possible with @use_ack bit.
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* @wake_base: Base address for wake enables. If zero unsupported.
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@ -820,6 +822,7 @@ struct regmap_irq_chip {
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unsigned int status_base;
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unsigned int mask_base;
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unsigned int unmask_base;
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unsigned int ack_base;
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unsigned int wake_base;
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unsigned int irq_reg_stride;
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