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ath9k: Cleanup ath9k.h
* Remove unused macros. * Move definitions to appropriate sections. Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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@ -29,39 +29,13 @@
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#include "dfs.h"
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#include "spectral.h"
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/*
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* Header for the ath9k.ko driver core *only* -- hw code nor any other driver
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* should rely on this file or its contents.
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*/
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struct ath_node;
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struct ath_rate_table;
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/* Macro to expand scalars to 64-bit objects */
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#define ito64(x) (sizeof(x) == 1) ? \
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(((unsigned long long int)(x)) & (0xff)) : \
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(sizeof(x) == 2) ? \
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(((unsigned long long int)(x)) & 0xffff) : \
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((sizeof(x) == 4) ? \
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(((unsigned long long int)(x)) & 0xffffffff) : \
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(unsigned long long int)(x))
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/* increment with wrap-around */
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#define INCR(_l, _sz) do { \
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(_l)++; \
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(_l) &= ((_sz) - 1); \
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} while (0)
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/* decrement with wrap-around */
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#define DECR(_l, _sz) do { \
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(_l)--; \
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(_l) &= ((_sz) - 1); \
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} while (0)
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#define TSF_TO_TU(_h,_l) \
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((((u32)(_h)) << 22) | (((u32)(_l)) >> 10))
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#define ATH_TXQ_SETUP(sc, i) ((sc)->tx.txqsetup & (1<<i))
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extern struct ieee80211_ops ath9k_ops;
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extern int ath9k_modparam_nohwcrypt;
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extern int led_blink;
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extern bool is_ath9k_unloaded;
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struct ath_config {
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u16 txpowlimit;
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@ -71,6 +45,17 @@ struct ath_config {
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/* Descriptor Management */
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/*************************/
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#define ATH_TXSTATUS_RING_SIZE 512
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/* Macro to expand scalars to 64-bit objects */
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#define ito64(x) (sizeof(x) == 1) ? \
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(((unsigned long long int)(x)) & (0xff)) : \
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(sizeof(x) == 2) ? \
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(((unsigned long long int)(x)) & 0xffff) : \
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((sizeof(x) == 4) ? \
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(((unsigned long long int)(x)) & 0xffffffff) : \
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(unsigned long long int)(x))
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#define ATH_TXBUF_RESET(_bf) do { \
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(_bf)->bf_lastbf = NULL; \
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(_bf)->bf_next = NULL; \
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@ -78,23 +63,6 @@ struct ath_config {
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sizeof(struct ath_buf_state)); \
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} while (0)
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/**
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* enum buffer_type - Buffer type flags
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*
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* @BUF_AMPDU: This buffer is an ampdu, as part of an aggregate (during TX)
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* @BUF_AGGR: Indicates whether the buffer can be aggregated
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* (used in aggregation scheduling)
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*/
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enum buffer_type {
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BUF_AMPDU = BIT(0),
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BUF_AGGR = BIT(1),
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};
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#define bf_isampdu(bf) (bf->bf_state.bf_type & BUF_AMPDU)
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#define bf_isaggr(bf) (bf->bf_state.bf_type & BUF_AGGR)
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#define ATH_TXSTATUS_RING_SIZE 512
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#define DS2PHYS(_dd, _ds) \
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((_dd)->dd_desc_paddr + ((caddr_t)(_ds) - (caddr_t)(_dd)->dd_desc))
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#define ATH_DESC_4KB_BOUND_CHECK(_daddr) ((((_daddr) & 0xFFF) > 0xF7F) ? 1 : 0)
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@ -114,11 +82,20 @@ int ath_descdma_setup(struct ath_softc *sc, struct ath_descdma *dd,
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/* RX / TX */
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/***********/
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#define ATH_TXQ_SETUP(sc, i) ((sc)->tx.txqsetup & (1<<i))
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/* increment with wrap-around */
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#define INCR(_l, _sz) do { \
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(_l)++; \
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(_l) &= ((_sz) - 1); \
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} while (0)
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#define ATH_RXBUF 512
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#define ATH_TXBUF 512
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#define ATH_TXBUF_RESERVE 5
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#define ATH_MAX_QDEPTH (ATH_TXBUF / 4 - ATH_TXBUF_RESERVE)
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#define ATH_TXMAXTRY 13
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#define ATH_MAX_SW_RETRIES 30
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#define TID_TO_WME_AC(_tid) \
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((((_tid) == 0) || ((_tid) == 3)) ? IEEE80211_AC_BE : \
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@ -134,6 +111,9 @@ int ath_descdma_setup(struct ath_softc *sc, struct ath_descdma *dd,
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#define ATH_AGGR_MIN_QDEPTH 2
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/* minimum h/w qdepth for non-aggregated traffic */
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#define ATH_NON_AGGR_MIN_QDEPTH 8
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#define ATH_TX_COMPLETE_POLL_INT 1000
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#define ATH_TXFIFO_DEPTH 8
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#define ATH_TX_ERROR 0x01
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#define IEEE80211_SEQ_SEQ_SHIFT 4
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#define IEEE80211_SEQ_MAX 4096
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@ -168,9 +148,6 @@ int ath_descdma_setup(struct ath_softc *sc, struct ath_descdma *dd,
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#define IS_CCK_RATE(rate) ((rate >= 0x18) && (rate <= 0x1e))
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#define ATH_TX_COMPLETE_POLL_INT 1000
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#define ATH_TXFIFO_DEPTH 8
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struct ath_txq {
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int mac80211_qnum; /* mac80211 queue number, -1 means not mac80211 Q */
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u32 axq_qnum; /* ath9k hardware queue number */
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@ -215,6 +192,21 @@ struct ath_rxbuf {
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dma_addr_t bf_buf_addr;
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};
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/**
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* enum buffer_type - Buffer type flags
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*
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* @BUF_AMPDU: This buffer is an ampdu, as part of an aggregate (during TX)
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* @BUF_AGGR: Indicates whether the buffer can be aggregated
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* (used in aggregation scheduling)
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*/
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enum buffer_type {
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BUF_AMPDU = BIT(0),
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BUF_AGGR = BIT(1),
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};
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#define bf_isampdu(bf) (bf->bf_state.bf_type & BUF_AMPDU)
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#define bf_isaggr(bf) (bf->bf_state.bf_type & BUF_AGGR)
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struct ath_buf_state {
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u8 bf_type;
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u8 bfs_paprd;
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@ -279,7 +271,6 @@ struct ath_tx_control {
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struct ieee80211_sta *sta;
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};
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#define ATH_TX_ERROR 0x01
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/**
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* @txq_map: Index is mac80211 queue number. This is
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@ -373,6 +364,22 @@ struct ath_vif {
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struct ath_buf *av_bcbuf;
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};
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struct ath9k_vif_iter_data {
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u8 hw_macaddr[ETH_ALEN]; /* address of the first vif */
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u8 mask[ETH_ALEN]; /* bssid mask */
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bool has_hw_macaddr;
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int naps; /* number of AP vifs */
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int nmeshes; /* number of mesh vifs */
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int nstations; /* number of station vifs */
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int nwds; /* number of WDS vifs */
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int nadhocs; /* number of adhoc vifs */
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};
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void ath9k_calculate_iter_data(struct ieee80211_hw *hw,
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struct ieee80211_vif *vif,
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struct ath9k_vif_iter_data *iter_data);
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/*******************/
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/* Beacon Handling */
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/*******************/
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@ -388,6 +395,9 @@ struct ath_vif {
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#define ATH_DEFAULT_BMISS_LIMIT 10
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#define IEEE80211_MS_TO_TU(x) (((x) * 1000) / 1024)
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#define TSF_TO_TU(_h,_l) \
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((((u32)(_h)) << 22) | (((u32)(_l)) >> 10))
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struct ath_beacon_config {
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int beacon_interval;
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u16 listen_interval;
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@ -441,10 +451,9 @@ bool ath9k_csa_is_finished(struct ath_softc *sc);
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#define ATH_LONG_CALINTERVAL_INT 1000 /* 1000 ms */
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#define ATH_LONG_CALINTERVAL 30000 /* 30 seconds */
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#define ATH_RESTART_CALINTERVAL 1200000 /* 20 minutes */
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#define ATH_ANI_MAX_SKIP_COUNT 10
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#define ATH_PAPRD_TIMEOUT 100 /* msecs */
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#define ATH_PLL_WORK_INTERVAL 100
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#define ATH_ANI_MAX_SKIP_COUNT 10
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#define ATH_PAPRD_TIMEOUT 100 /* msecs */
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#define ATH_PLL_WORK_INTERVAL 100
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void ath_tx_complete_poll_work(struct work_struct *work);
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void ath_reset_work(struct work_struct *work);
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@ -538,12 +547,6 @@ static inline int ath9k_dump_btcoex(struct ath_softc *sc, u8 *buf, u32 size)
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}
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#endif /* CONFIG_ATH9K_BTCOEX_SUPPORT */
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struct ath9k_wow_pattern {
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u8 pattern_bytes[MAX_PATTERN_SIZE];
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u8 mask_bytes[MAX_PATTERN_SIZE];
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u32 pattern_len;
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};
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/********************/
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/* LED Control */
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/********************/
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@ -575,6 +578,12 @@ static inline void ath_fill_led_pin(struct ath_softc *sc)
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/* Wake on Wireless LAN */
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/************************/
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struct ath9k_wow_pattern {
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u8 pattern_bytes[MAX_PATTERN_SIZE];
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u8 mask_bytes[MAX_PATTERN_SIZE];
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u32 pattern_len;
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};
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#ifdef CONFIG_ATH9K_WOW
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void ath9k_init_wow(struct ieee80211_hw *hw);
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int ath9k_suspend(struct ieee80211_hw *hw,
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@ -678,13 +687,8 @@ void ath_ant_comb_scan(struct ath_softc *sc, struct ath_rx_status *rs);
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* Used when PCI device not fully initialized by bootrom/BIOS
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*/
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#define DEFAULT_CACHELINE 32
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#define ATH_REGCLASSIDS_MAX 10
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#define ATH_CABQ_READY_TIME 80 /* % of beacon interval */
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#define ATH_MAX_SW_RETRIES 30
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#define ATH_CHAN_MAX 255
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#define ATH_TXPOWER_MAX 100 /* .5 dBm units */
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#define ATH_RATE_DUMMY_MARKER 0
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enum sc_op_flags {
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SC_OP_INVALID,
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@ -703,20 +707,6 @@ enum sc_op_flags {
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#define PS_BEACON_SYNC BIT(4)
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#define PS_WAIT_FOR_ANI BIT(5)
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struct ath_rate_table;
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struct ath9k_vif_iter_data {
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u8 hw_macaddr[ETH_ALEN]; /* address of the first vif */
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u8 mask[ETH_ALEN]; /* bssid mask */
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bool has_hw_macaddr;
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int naps; /* number of AP vifs */
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int nmeshes; /* number of mesh vifs */
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int nstations; /* number of station vifs */
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int nwds; /* number of WDS vifs */
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int nadhocs; /* number of adhoc vifs */
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};
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struct ath_softc {
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struct ieee80211_hw *hw;
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struct device *dev;
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@ -826,19 +816,13 @@ static inline int ath9k_tx99_send(struct ath_softc *sc,
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}
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#endif /* CONFIG_ATH9K_TX99 */
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void ath9k_tasklet(unsigned long data);
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int ath_cabq_update(struct ath_softc *);
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static inline void ath_read_cachesize(struct ath_common *common, int *csz)
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{
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common->bus_ops->read_cachesize(common, csz);
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}
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extern struct ieee80211_ops ath9k_ops;
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extern int ath9k_modparam_nohwcrypt;
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extern int led_blink;
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extern bool is_ath9k_unloaded;
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void ath9k_tasklet(unsigned long data);
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int ath_cabq_update(struct ath_softc *);
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u8 ath9k_parse_mpdudensity(u8 mpdudensity);
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irqreturn_t ath_isr(int irq, void *dev);
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int ath_reset(struct ath_softc *sc);
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@ -847,8 +831,12 @@ void ath_restart_work(struct ath_softc *sc);
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int ath9k_init_device(u16 devid, struct ath_softc *sc,
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const struct ath_bus_ops *bus_ops);
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void ath9k_deinit_device(struct ath_softc *sc);
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void ath9k_set_hw_capab(struct ath_softc *sc, struct ieee80211_hw *hw);
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void ath9k_reload_chainmask_settings(struct ath_softc *sc);
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u8 ath_txchainmask_reduction(struct ath_softc *sc, u8 chainmask, u32 rate);
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void ath_start_rfkill_poll(struct ath_softc *sc);
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void ath9k_rfkill_poll_state(struct ieee80211_hw *hw);
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void ath9k_ps_wakeup(struct ath_softc *sc);
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void ath9k_ps_restore(struct ath_softc *sc);
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#ifdef CONFIG_ATH9K_PCI
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int ath_pci_init(void);
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@ -866,15 +854,4 @@ static inline int ath_ahb_init(void) { return 0; };
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static inline void ath_ahb_exit(void) {};
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#endif
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void ath9k_ps_wakeup(struct ath_softc *sc);
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void ath9k_ps_restore(struct ath_softc *sc);
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u8 ath_txchainmask_reduction(struct ath_softc *sc, u8 chainmask, u32 rate);
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void ath_start_rfkill_poll(struct ath_softc *sc);
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void ath9k_rfkill_poll_state(struct ieee80211_hw *hw);
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void ath9k_calculate_iter_data(struct ieee80211_hw *hw,
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struct ieee80211_vif *vif,
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struct ath9k_vif_iter_data *iter_data);
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#endif /* ATH9K_H */
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@ -899,7 +899,7 @@ static const struct ieee80211_iface_combination if_comb[] = {
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}
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};
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void ath9k_set_hw_capab(struct ath_softc *sc, struct ieee80211_hw *hw)
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static void ath9k_set_hw_capab(struct ath_softc *sc, struct ieee80211_hw *hw)
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{
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struct ath_hw *ah = sc->sc_ah;
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struct ath_common *common = ath9k_hw_common(ah);
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