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drm/i915/icl: Define DSI transcoder timing registers

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This patch defines registers and bitfields used for
programming DSI transcoder's horizontal and vertical
timings.

v2: Remove TRANS_TIMING_SHIFT definition

v3 by Jani:
 - Group macros by transcoder

Signed-off-by: Madhav Chauhan <madhav.chauhan@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/dcc329280e3aca5b4fc3482c5bcaa0cac043c5d8.1539613303.git.jani.nikula@intel.com
This commit is contained in:
Madhav Chauhan 2018-10-15 17:28:02 +03:00 committed by Jani Nikula
parent 70f4f502c4
commit 7b56caf363
1 changed files with 14 additions and 0 deletions
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14
drivers/gpu/drm/i915/i915_reg.h
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@ -4023,6 +4023,20 @@ enum {
#define _VSYNCSHIFT_B 0x61028
#define _PIPE_MULT_B 0x6102c
/* DSI 0 timing regs */
#define _HTOTAL_DSI0 0x6b000
#define _HSYNC_DSI0 0x6b008
#define _VTOTAL_DSI0 0x6b00c
#define _VSYNC_DSI0 0x6b014
#define _VSYNCSHIFT_DSI0 0x6b028
/* DSI 1 timing regs */
#define _HTOTAL_DSI1 0x6b800
#define _HSYNC_DSI1 0x6b808
#define _VTOTAL_DSI1 0x6b80c
#define _VSYNC_DSI1 0x6b814
#define _VSYNCSHIFT_DSI1 0x6b828
#define TRANSCODER_A_OFFSET 0x60000
#define TRANSCODER_B_OFFSET 0x61000
#define TRANSCODER_C_OFFSET 0x62000