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ARM: dts: meson: add the clock inputs for the Meson timer

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The Meson Timer IP block has two clock inputs:
- clk81 for using the system clock as timebase
- xtal for a timebase with 1us, 10us, 100us and 1ms resolution

The clocksource driver does not use these yet, but it's still a good
idea to add them as this describes how the hardware actually works
internally.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
This commit is contained in:
Martin Blumenstingl 2018-11-16 21:42:35 +01:00 committed by Kevin Hilman
parent 523b8b31d3
commit 7b141abe4a
4 changed files with 16 additions and 1 deletions
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2
arch/arm/boot/dts/meson.dtsi
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@ -197,7 +197,7 @@ wdt: watchdog@9900 {
interrupts = <GIC_SPI 0 IRQ_TYPE_EDGE_RISING>;
};
timer@9940 {
timer_abcde: timer@9940 {
compatible = "amlogic,meson6-timer";
reg = <0x9940 0x18>;
interrupts = <GIC_SPI 10 IRQ_TYPE_EDGE_RISING>,

5
arch/arm/boot/dts/meson6.dtsi
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@ -88,6 +88,11 @@ &efuse {
status = "disabled";
};
&timer_abcde {
clocks = <&xtal>, <&clk81>;
clock-names = "xtal", "pclk";
};
&uart_AO {
clocks = <&xtal>, <&clk81>, <&clk81>;
clock-names = "xtal", "pclk", "baud";

5
arch/arm/boot/dts/meson8.dtsi
View File

@ -387,6 +387,11 @@ &spifc {
clocks = <&clkc CLKID_CLK81>;
};
&timer_abcde {
clocks = <&clkc CLKID_XTAL>, <&clkc CLKID_CLK81>;
clock-names = "xtal", "pclk";
};
&uart_AO {
compatible = "amlogic,meson8-uart", "amlogic,meson-uart";
clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_XTAL>, <&clkc CLKID_CLK81>;

5
arch/arm/boot/dts/meson8b.dtsi
View File

@ -370,6 +370,11 @@ &sdio {
clock-names = "core", "clkin";
};
&timer_abcde {
clocks = <&clkc CLKID_XTAL>, <&clkc CLKID_CLK81>;
clock-names = "xtal", "pclk";
};
&uart_AO {
compatible = "amlogic,meson8b-uart", "amlogic,meson-uart";
clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_XTAL>, <&clkc CLKID_CLK81>;