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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-06 14:56:38 +07:00
bnxt_en: Improve completion ring allocation for VFs.
All available remaining completion rings not used by the PF should be made available for the VFs so that there are enough rings in the VF to support RDMA. The earlier workaround code of capping the rings by the statistics context is removed. When SRIOV is disabled, call a new function bnxt_restore_pf_fw_resources() to restore FW resources. Later on we need to add some logic to account for RDMA resources. Signed-off-by: Somnath Kotur <somnath.kotur@broadcom.com> Signed-off-by: Michael Chan <michael.chan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -4152,7 +4152,7 @@ static int bnxt_hwrm_func_qcfg(struct bnxt *bp)
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return rc;
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}
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int bnxt_hwrm_func_qcaps(struct bnxt *bp)
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static int bnxt_hwrm_func_qcaps(struct bnxt *bp)
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{
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int rc = 0;
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struct hwrm_func_qcaps_input req = {0};
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@ -6856,6 +6856,12 @@ static int bnxt_set_dflt_rings(struct bnxt *bp)
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return rc;
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}
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void bnxt_restore_pf_fw_resources(struct bnxt *bp)
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{
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ASSERT_RTNL();
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bnxt_hwrm_func_qcaps(bp);
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}
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static void bnxt_parse_log_pcie_link(struct bnxt *bp)
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{
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enum pcie_link_width width = PCIE_LNK_WIDTH_UNKNOWN;
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@ -1234,7 +1234,6 @@ int _hwrm_send_message(struct bnxt *, void *, u32, int);
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int hwrm_send_message(struct bnxt *, void *, u32, int);
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int hwrm_send_message_silent(struct bnxt *, void *, u32, int);
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int bnxt_hwrm_set_coal(struct bnxt *);
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int bnxt_hwrm_func_qcaps(struct bnxt *);
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void bnxt_set_max_func_irqs(struct bnxt *bp, unsigned int max);
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void bnxt_tx_disable(struct bnxt *bp);
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void bnxt_tx_enable(struct bnxt *bp);
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@ -1245,4 +1244,5 @@ int bnxt_open_nic(struct bnxt *, bool, bool);
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int bnxt_close_nic(struct bnxt *, bool, bool);
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int bnxt_setup_mq_tc(struct net_device *dev, u8 tc);
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int bnxt_get_max_rings(struct bnxt *, int *, int *, bool);
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void bnxt_restore_pf_fw_resources(struct bnxt *bp);
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#endif
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@ -420,15 +420,7 @@ static int bnxt_hwrm_func_cfg(struct bnxt *bp, int num_vfs)
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bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_FUNC_CFG, -1, -1);
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/* Remaining rings are distributed equally amongs VF's for now */
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/* TODO: the following workaroud is needed to restrict total number
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* of vf_cp_rings not exceed number of HW ring groups. This WA should
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* be removed once new HWRM provides HW ring groups capability in
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* hwrm_func_qcap.
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*/
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vf_cp_rings = min_t(u16, pf->max_cp_rings, pf->max_stat_ctxs);
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vf_cp_rings = (vf_cp_rings - bp->cp_nr_rings) / num_vfs;
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/* TODO: restore this logic below once the WA above is removed */
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/* vf_cp_rings = (pf->max_cp_rings - bp->cp_nr_rings) / num_vfs; */
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vf_cp_rings = (pf->max_cp_rings - bp->cp_nr_rings) / num_vfs;
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vf_stat_ctx = (pf->max_stat_ctxs - bp->num_stat_ctxs) / num_vfs;
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if (bp->flags & BNXT_FLAG_AGG_RINGS)
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vf_rx_rings = (pf->max_rx_rings - bp->rx_nr_rings * 2) /
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@ -590,7 +582,9 @@ void bnxt_sriov_disable(struct bnxt *bp)
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bp->pf.active_vfs = 0;
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/* Reclaim all resources for the PF. */
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bnxt_hwrm_func_qcaps(bp);
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rtnl_lock();
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bnxt_restore_pf_fw_resources(bp);
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rtnl_unlock();
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}
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int bnxt_sriov_configure(struct pci_dev *pdev, int num_vfs)
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