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MIPS: SEAD3: Probe EHCI controller using DT

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Probe the SEAD3 EHCI controller using the generic-ehci driver & device
tree rather than platform code, in order to reduce the amount of the
latter.

Now that no devices probed from platform code require interrupts, remove
the retrieval of the IRQ domain & sead3int.h.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: linux-mips@linux-mips.org
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/14051/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Paul Burton 2016-08-26 15:17:38 +01:00 committed by Ralf Baechle
parent a34e93882d
commit 7afd2a5aec
4 changed files with 23 additions and 81 deletions
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9
arch/mips/boot/dts/mti/sead3.dts
View File

@ -60,6 +60,15 @@ timer {
};
};
ehci@1b200000 {
compatible = "generic-ehci";
reg = <0x1b200000 0x1000>;
interrupts = <0>; /* GIC 0 or CPU 6 */
has-transaction-translator;
};
/* UART connected to FTDI & miniUSB socket */
uart0: uart@1f000900 {
compatible = "ns16550a";

21
arch/mips/include/asm/mips-boards/sead3int.h
View File

@ -1,21 +0,0 @@
/*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (C) 2000,2012 MIPS Technologies, Inc. All rights reserved.
* Douglas Leung <douglas@mips.com>
* Steven J. Hill <sjhill@mips.com>
*/
#ifndef _MIPS_SEAD3INT_H
#define _MIPS_SEAD3INT_H
#include <linux/irqchip/mips-gic.h>
/* CPU interrupt offsets */
#define CPU_INT_EHCI 2
/* GIC interrupt offsets */
#define GIC_INT_EHCI GIC_SHARED_TO_HWIRQ(5)
#endif /* !(_MIPS_SEAD3INT_H) */

15
arch/mips/mti-sead3/sead3-dtshim.c
View File

@ -24,9 +24,10 @@ static unsigned char fdt_buf[16 << 10] __initdata;
static int remove_gic(void *fdt)
{
const unsigned int cpu_ehci_int = 2;
const unsigned int cpu_uart_int = 4;
const unsigned int cpu_eth_int = 6;
int gic_off, cpu_off, uart_off, eth_off, err;
int gic_off, cpu_off, uart_off, eth_off, ehci_off, err;
uint32_t cfg, cpu_phandle;
/* leave the GIC node intact if a GIC is present */
@ -95,6 +96,18 @@ static int remove_gic(void *fdt)
return err;
}
ehci_off = fdt_node_offset_by_compatible(fdt, -1, "mti,sead3-ehci");
if (ehci_off < 0) {
pr_err("unable to find EHCI DT node: %d\n", ehci_off);
return ehci_off;
}
err = fdt_setprop_u32(fdt, ehci_off, "interrupts", cpu_ehci_int);
if (err) {
pr_err("unable to set EHCI interrupts property: %d\n", err);
return err;
}
return 0;
}

59
arch/mips/mti-sead3/sead3-platform.c
View File

@ -7,16 +7,10 @@
*/
#include <linux/dma-mapping.h>
#include <linux/init.h>
#include <linux/irq.h>
#include <linux/irqchip/mips-gic.h>
#include <linux/irqdomain.h>
#include <linux/leds.h>
#include <linux/mtd/physmap.h>
#include <linux/of.h>
#include <linux/platform_device.h>
#include <asm/mips-boards/sead3int.h>
static struct mtd_partition sead3_mtd_partitions[] = {
{
.name = "User FS",
@ -118,68 +112,15 @@ static struct platform_device sead3_led_device = {
.id = -1,
};
static struct resource ehci_resources[] = {
{
.start = 0x1b200000,
.end = 0x1b200fff,
.flags = IORESOURCE_MEM
}, {
.flags = IORESOURCE_IRQ
}
};
static u64 sead3_usbdev_dma_mask = DMA_BIT_MASK(32);
static struct platform_device ehci_device = {
.name = "sead3-ehci",
.id = 0,
.dev = {
.dma_mask = &sead3_usbdev_dma_mask,
.coherent_dma_mask = DMA_BIT_MASK(32)
},
.num_resources = ARRAY_SIZE(ehci_resources),
.resource = ehci_resources
};
static struct platform_device *sead3_platform_devices[] __initdata = {
&sead3_flash,
&pled_device,
&fled_device,
&sead3_led_device,
&ehci_device,
};
static int __init sead3_platforms_device_init(void)
{
const char *intc_compat;
struct device_node *node;
struct irq_domain *irqd;
if (gic_present)
intc_compat = "mti,gic";
else
intc_compat = "mti,cpu-interrupt-controller";
node = of_find_compatible_node(NULL, NULL, intc_compat);
if (!node) {
pr_err("unable to find interrupt controller DT node\n");
return -ENODEV;
}
irqd = irq_find_host(node);
if (!irqd) {
pr_err("unable to find interrupt controller IRQ domain\n");
return -ENODEV;
}
if (gic_present) {
ehci_resources[1].start =
irq_create_mapping(irqd, GIC_INT_EHCI);
} else {
ehci_resources[1].start =
irq_create_mapping(irqd, CPU_INT_EHCI);
}
return platform_add_devices(sead3_platform_devices,
ARRAY_SIZE(sead3_platform_devices));
}