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drm/amd/display: handle active dongle port type is DP++ or DP case
[Why]: Some active dongles have DP++ port and DP port at the same time. Current code doesn't cover DP++ case and processes as default DVI case, in which audio is disabled. Because of dual mode, DP case is also treat as DVI case for the other port. [How]: According DP 1.4 spec, add DP++ procedure similar with HDMI case. Also add None dongle type for DP case. Signed-off-by: Dale Zhao <dale.zhao@amd.com> Reviewed-by: Wenjing Liu <wenjing.liu@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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21ffcc94d5
commit
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@ -2398,8 +2398,8 @@ static void get_active_converter_info(
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case DOWNSTREAM_VGA:
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link->dpcd_caps.dongle_type = DISPLAY_DONGLE_DP_VGA_CONVERTER;
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break;
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case DOWNSTREAM_DVI_HDMI:
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/* At this point we don't know is it DVI or HDMI,
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case DOWNSTREAM_DVI_HDMI_DP_PLUS_PLUS:
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/* At this point we don't know is it DVI or HDMI or DP++,
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* assume DVI.*/
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link->dpcd_caps.dongle_type = DISPLAY_DONGLE_DP_DVI_CONVERTER;
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break;
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@ -2416,6 +2416,10 @@ static void get_active_converter_info(
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det_caps, sizeof(det_caps));
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switch (port_caps->bits.DWN_STRM_PORTX_TYPE) {
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/*Handle DP case as DONGLE_NONE*/
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case DOWN_STREAM_DETAILED_DP:
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link->dpcd_caps.dongle_type = DISPLAY_DONGLE_NONE;
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break;
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case DOWN_STREAM_DETAILED_VGA:
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link->dpcd_caps.dongle_type =
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DISPLAY_DONGLE_DP_VGA_CONVERTER;
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@ -2425,6 +2429,8 @@ static void get_active_converter_info(
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DISPLAY_DONGLE_DP_DVI_CONVERTER;
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break;
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case DOWN_STREAM_DETAILED_HDMI:
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case DOWN_STREAM_DETAILED_DP_PLUS_PLUS:
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/*Handle DP++ active converter case, process DP++ case as HDMI case according DP1.4 spec*/
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link->dpcd_caps.dongle_type =
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DISPLAY_DONGLE_DP_HDMI_CONVERTER;
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@ -2440,14 +2446,18 @@ static void get_active_converter_info(
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link->dpcd_caps.dongle_caps.is_dp_hdmi_s3d_converter =
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hdmi_caps.bits.FRAME_SEQ_TO_FRAME_PACK;
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link->dpcd_caps.dongle_caps.is_dp_hdmi_ycbcr422_pass_through =
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hdmi_caps.bits.YCrCr422_PASS_THROUGH;
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link->dpcd_caps.dongle_caps.is_dp_hdmi_ycbcr420_pass_through =
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hdmi_caps.bits.YCrCr420_PASS_THROUGH;
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link->dpcd_caps.dongle_caps.is_dp_hdmi_ycbcr422_converter =
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hdmi_caps.bits.YCrCr422_CONVERSION;
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link->dpcd_caps.dongle_caps.is_dp_hdmi_ycbcr420_converter =
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hdmi_caps.bits.YCrCr420_CONVERSION;
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/*YCBCR capability only for HDMI case*/
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if (port_caps->bits.DWN_STRM_PORTX_TYPE
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== DOWN_STREAM_DETAILED_HDMI) {
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link->dpcd_caps.dongle_caps.is_dp_hdmi_ycbcr422_pass_through =
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hdmi_caps.bits.YCrCr422_PASS_THROUGH;
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link->dpcd_caps.dongle_caps.is_dp_hdmi_ycbcr420_pass_through =
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hdmi_caps.bits.YCrCr420_PASS_THROUGH;
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link->dpcd_caps.dongle_caps.is_dp_hdmi_ycbcr422_converter =
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hdmi_caps.bits.YCrCr422_CONVERSION;
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link->dpcd_caps.dongle_caps.is_dp_hdmi_ycbcr420_converter =
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hdmi_caps.bits.YCrCr420_CONVERSION;
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}
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link->dpcd_caps.dongle_caps.dp_hdmi_max_bpc =
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translate_dpcd_max_bpc(
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@ -43,7 +43,7 @@ enum dpcd_revision {
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enum dpcd_downstream_port_type {
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DOWNSTREAM_DP = 0,
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DOWNSTREAM_VGA,
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DOWNSTREAM_DVI_HDMI,
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DOWNSTREAM_DVI_HDMI_DP_PLUS_PLUS,/* DVI, HDMI, DP++ */
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DOWNSTREAM_NONDDC /* has no EDID (TV,CV) */
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};
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