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ARM: dts: imx6q-apalis: mux RESET_MOCI# signal

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The pinctrl properties on the IOMUXC node get overwritten by the
carrier board level device tree, hence the pinctrl_reset_moci
pinctrl does not get applied.

Associate the pinctrl_reset_moci pinctrl with the PCIe node where
we also make use of the pin as a reset GPIO.

Since the pin is muxed as a GPIO by default not muxing it explicitly
worked fine in practise.

Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Stefan Agner 2018-09-06 16:46:58 -07:00 committed by Shawn Guo
parent 37f2c30316
commit 78f10734f9
4 changed files with 6 additions and 4 deletions
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2
arch/arm/boot/dts/imx6q-apalis-eval.dts
View File

@ -196,6 +196,8 @@ &ldb {
};
&pcie {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_reset_moci>;
/* active-high meaning opposite of regular PERST# active-low polarity */
reset-gpio = <&gpio1 28 GPIO_ACTIVE_HIGH>;
reset-gpio-active-high;

2
arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts
View File

@ -196,6 +196,8 @@ &ldb {
};
&pcie {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_reset_moci>;
/* active-high meaning opposite of regular PERST# active-low polarity */
reset-gpio = <&gpio1 28 GPIO_ACTIVE_HIGH>;
reset-gpio-active-high;

2
arch/arm/boot/dts/imx6q-apalis-ixora.dts
View File

@ -200,6 +200,8 @@ &ldb {
};
&pcie {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_reset_moci>;
/* active-high meaning opposite of regular PERST# active-low polarity */
reset-gpio = <&gpio1 28 GPIO_ACTIVE_HIGH>;
reset-gpio-active-high;

4
arch/arm/boot/dts/imx6qdl-apalis.dtsi
View File

@ -482,10 +482,6 @@ &weim {
};
&iomuxc {
/* pins used on module */
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_reset_moci>;
pinctrl_apalis_gpio1: gpio2io04grp {
fsl,pins = <
MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x130b0