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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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qed: Drop the 's' from num_ports_in_engines
The parameter reflects the number of physical ports connected to a single engine, not all. Signed-off-by: Tomer Tayar <Tomer.Tayar@cavium.com> Signed-off-by: Yuval Mintz <Yuval.Mintz@cavium.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -633,7 +633,7 @@ struct qed_dev {
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#define CHIP_BOND_ID_SHIFT 0
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u8 num_engines;
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u8 num_ports_in_engines;
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u8 num_ports_in_engine;
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u8 num_funcs_in_port;
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u8 path_id;
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@ -300,7 +300,7 @@ static void qed_init_qm_params(struct qed_hwfn *p_hwfn)
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qm_info->vport_wfq_en = 1;
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/* TC config is different for AH 4 port */
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four_port = p_hwfn->cdev->num_ports_in_engines == MAX_NUM_PORTS_K2;
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four_port = p_hwfn->cdev->num_ports_in_engine == MAX_NUM_PORTS_K2;
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/* in AH 4 port we have fewer TCs per port */
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qm_info->max_phys_tcs_per_port = four_port ? NUM_PHYS_TCS_4PORT_K2 :
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@ -329,7 +329,7 @@ static void qed_init_qm_vport_params(struct qed_hwfn *p_hwfn)
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static void qed_init_qm_port_params(struct qed_hwfn *p_hwfn)
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{
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/* Initialize qm port parameters */
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u8 i, active_phys_tcs, num_ports = p_hwfn->cdev->num_ports_in_engines;
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u8 i, active_phys_tcs, num_ports = p_hwfn->cdev->num_ports_in_engine;
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/* indicate how ooo and high pri traffic is dealt with */
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active_phys_tcs = num_ports == MAX_NUM_PORTS_K2 ?
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@ -693,7 +693,7 @@ static void qed_dp_init_qm_params(struct qed_hwfn *p_hwfn)
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qm_info->num_pf_rls, qed_get_pq_flags(p_hwfn));
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/* port table */
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for (i = 0; i < p_hwfn->cdev->num_ports_in_engines; i++) {
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for (i = 0; i < p_hwfn->cdev->num_ports_in_engine; i++) {
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port = &(qm_info->qm_port_params[i]);
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DP_VERBOSE(p_hwfn,
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NETIF_MSG_HW,
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@ -823,7 +823,7 @@ static int qed_alloc_qm_data(struct qed_hwfn *p_hwfn)
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goto alloc_err;
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qm_info->qm_port_params = kzalloc(sizeof(*qm_info->qm_port_params) *
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p_hwfn->cdev->num_ports_in_engines,
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p_hwfn->cdev->num_ports_in_engine,
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GFP_KERNEL);
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if (!qm_info->qm_port_params)
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goto alloc_err;
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@ -1108,7 +1108,7 @@ static int qed_calc_hw_mode(struct qed_hwfn *p_hwfn)
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return -EINVAL;
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}
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switch (p_hwfn->cdev->num_ports_in_engines) {
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switch (p_hwfn->cdev->num_ports_in_engine) {
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case 1:
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hw_mode |= 1 << MODE_PORTS_PER_ENG_1;
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break;
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@ -1120,7 +1120,7 @@ static int qed_calc_hw_mode(struct qed_hwfn *p_hwfn)
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break;
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default:
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DP_NOTICE(p_hwfn, "num_ports_in_engine = %d not supported\n",
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p_hwfn->cdev->num_ports_in_engines);
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p_hwfn->cdev->num_ports_in_engine);
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return -EINVAL;
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}
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@ -1253,7 +1253,7 @@ static int qed_hw_init_common(struct qed_hwfn *p_hwfn,
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}
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memset(¶ms, 0, sizeof(params));
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params.max_ports_per_engine = p_hwfn->cdev->num_ports_in_engines;
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params.max_ports_per_engine = p_hwfn->cdev->num_ports_in_engine;
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params.max_phys_tcs_per_port = qm_info->max_phys_tcs_per_port;
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params.pf_rl_en = qm_info->pf_rl_en;
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params.pf_wfq_en = qm_info->pf_wfq_en;
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@ -2245,7 +2245,7 @@ int qed_hw_get_dflt_resc(struct qed_hwfn *p_hwfn,
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case QED_BDQ:
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if (!*p_resc_num)
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*p_resc_start = 0;
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else if (p_hwfn->cdev->num_ports_in_engines == 4)
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else if (p_hwfn->cdev->num_ports_in_engine == 4)
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*p_resc_start = p_hwfn->port_id;
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else if (p_hwfn->hw_info.personality == QED_PCI_ISCSI)
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*p_resc_start = p_hwfn->port_id;
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@ -2662,15 +2662,15 @@ static void qed_hw_info_port_num_bb(struct qed_hwfn *p_hwfn,
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port_mode = qed_rd(p_hwfn, p_ptt, CNIG_REG_NW_PORT_MODE_BB_B0);
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if (port_mode < 3) {
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p_hwfn->cdev->num_ports_in_engines = 1;
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p_hwfn->cdev->num_ports_in_engine = 1;
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} else if (port_mode <= 5) {
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p_hwfn->cdev->num_ports_in_engines = 2;
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p_hwfn->cdev->num_ports_in_engine = 2;
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} else {
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DP_NOTICE(p_hwfn, "PORT MODE: %d not supported\n",
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p_hwfn->cdev->num_ports_in_engines);
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p_hwfn->cdev->num_ports_in_engine);
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/* Default num_ports_in_engines to something */
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p_hwfn->cdev->num_ports_in_engines = 1;
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/* Default num_ports_in_engine to something */
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p_hwfn->cdev->num_ports_in_engine = 1;
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}
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}
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@ -2680,20 +2680,20 @@ static void qed_hw_info_port_num_ah(struct qed_hwfn *p_hwfn,
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u32 port;
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int i;
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p_hwfn->cdev->num_ports_in_engines = 0;
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p_hwfn->cdev->num_ports_in_engine = 0;
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for (i = 0; i < MAX_NUM_PORTS_K2; i++) {
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port = qed_rd(p_hwfn, p_ptt,
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CNIG_REG_NIG_PORT0_CONF_K2 + (i * 4));
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if (port & 1)
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p_hwfn->cdev->num_ports_in_engines++;
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p_hwfn->cdev->num_ports_in_engine++;
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}
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if (!p_hwfn->cdev->num_ports_in_engines) {
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if (!p_hwfn->cdev->num_ports_in_engine) {
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DP_NOTICE(p_hwfn, "All NIG ports are inactive\n");
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/* Default num_ports_in_engine to something */
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p_hwfn->cdev->num_ports_in_engines = 1;
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p_hwfn->cdev->num_ports_in_engine = 1;
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}
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}
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@ -4067,7 +4067,7 @@ static int qed_device_num_ports(struct qed_dev *cdev)
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if (cdev->num_hwfns > 1)
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return 1;
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return cdev->num_ports_in_engines * qed_device_num_engines(cdev);
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return cdev->num_ports_in_engine * qed_device_num_engines(cdev);
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}
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int qed_device_get_port_id(struct qed_dev *cdev)
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@ -482,7 +482,7 @@ int qed_mcp_bist_nvm_test_get_image_att(struct qed_hwfn *p_hwfn,
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#define MCP_PF_ID(p_hwfn) MCP_PF_ID_BY_REL(p_hwfn, (p_hwfn)->rel_pf_id)
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#define MFW_PORT(_p_hwfn) ((_p_hwfn)->abs_pf_id % \
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((_p_hwfn)->cdev->num_ports_in_engines * \
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((_p_hwfn)->cdev->num_ports_in_engine * \
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qed_device_num_engines((_p_hwfn)->cdev)))
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struct qed_mcp_info {
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@ -80,7 +80,7 @@ static int qed_ptp_res_lock(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
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/* MFW doesn't support resource locking, first PF on the port
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* has lock ownership.
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*/
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if (p_hwfn->abs_pf_id < p_hwfn->cdev->num_ports_in_engines)
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if (p_hwfn->abs_pf_id < p_hwfn->cdev->num_ports_in_engine)
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return 0;
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DP_INFO(p_hwfn, "PF doesn't have lock ownership\n");
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@ -108,7 +108,7 @@ static int qed_ptp_res_unlock(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
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rc = qed_mcp_resc_unlock(p_hwfn, p_ptt, ¶ms);
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if (rc == -EINVAL) {
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/* MFW doesn't support locking, first PF has lock ownership */
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if (p_hwfn->abs_pf_id < p_hwfn->cdev->num_ports_in_engines) {
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if (p_hwfn->abs_pf_id < p_hwfn->cdev->num_ports_in_engine) {
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rc = 0;
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} else {
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DP_INFO(p_hwfn, "PF doesn't have lock ownership\n");
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