Merge master.kernel.org:/home/rmk/linux-2.6-arm

* master.kernel.org:/home/rmk/linux-2.6-arm:
  [ARM] update mach-types
  [ARM] Add cmpxchg support for ARMv6+ systems (v5)
  [ARM] barriers: improve xchg, bitops and atomic SMP barriers
  Gemini: Fix SRAM/ROM location after memory swap
  MAINTAINER: Add F: entries for Gemini and FA526
  [ARM] disable NX support for OABI-supporting kernels
  [ARM] add coherent DMA mask for mv643xx_eth
  [ARM] pxa/palm: fix PalmLD/T5/TX AC97 MFP
  [ARM] pxa: add parameter to clksrc_read() for pxa168/910
  [ARM] pxa: fix the incorrectly defined drive strength macros for pxa{168,910}
  [ARM] Orion: Remove explicit name for platform device resources
  [ARM] Kirkwood: Correct MPP for SATA activity/presence LEDs of QNAP TS-119/TS-219.
  [ARM] pxa/ezx: fix pin configuration for low power mode
  [ARM] pxa/spitz: provide spitz_ohci_exit() that unregisters USB_HOST GPIO
  [ARM] pxa: enable GPIO receivers after configuring pins
  [ARM] pxa: allow gpio_reset drive high during normal work
  [ARM] pxa: save/restore PGSR on suspend/resume.
This commit is contained in:
Linus Torvalds 2009-05-29 16:07:39 -07:00
commit 78b170f45b
27 changed files with 462 additions and 67 deletions

View File

@ -624,6 +624,7 @@ M: paulius.zaleckas@teltonika.lt
L: linux-arm-kernel@lists.arm.linux.org.uk (subscribers-only)
T: git git://gitorious.org/linux-gemini/mainline.git
S: Maintained
F: arch/arm/mach-gemini/
ARM/EBSA110 MACHINE SUPPORT
P: Russell King
@ -650,6 +651,7 @@ P: Paulius Zaleckas
M: paulius.zaleckas@teltonika.lt
L: linux-arm-kernel@lists.arm.linux.org.uk (subscribers-only)
S: Maintained
F: arch/arm/mm/*-fa*
ARM/FOOTBRIDGE ARCHITECTURE
P: Russell King

View File

@ -114,3 +114,16 @@
.align 3; \
.long 9999b,9001f; \
.previous
/*
* SMP data memory barrier
*/
.macro smp_dmb
#ifdef CONFIG_SMP
#if __LINUX_ARM_ARCH__ >= 7
dmb
#elif __LINUX_ARM_ARCH__ == 6
mcr p15, 0, r0, c7, c10, 5 @ dmb
#endif
#endif
.endm

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@ -44,11 +44,29 @@ static inline void atomic_set(atomic_t *v, int i)
: "cc");
}
static inline void atomic_add(int i, atomic_t *v)
{
unsigned long tmp;
int result;
__asm__ __volatile__("@ atomic_add\n"
"1: ldrex %0, [%2]\n"
" add %0, %0, %3\n"
" strex %1, %0, [%2]\n"
" teq %1, #0\n"
" bne 1b"
: "=&r" (result), "=&r" (tmp)
: "r" (&v->counter), "Ir" (i)
: "cc");
}
static inline int atomic_add_return(int i, atomic_t *v)
{
unsigned long tmp;
int result;
smp_mb();
__asm__ __volatile__("@ atomic_add_return\n"
"1: ldrex %0, [%2]\n"
" add %0, %0, %3\n"
@ -59,14 +77,34 @@ static inline int atomic_add_return(int i, atomic_t *v)
: "r" (&v->counter), "Ir" (i)
: "cc");
smp_mb();
return result;
}
static inline void atomic_sub(int i, atomic_t *v)
{
unsigned long tmp;
int result;
__asm__ __volatile__("@ atomic_sub\n"
"1: ldrex %0, [%2]\n"
" sub %0, %0, %3\n"
" strex %1, %0, [%2]\n"
" teq %1, #0\n"
" bne 1b"
: "=&r" (result), "=&r" (tmp)
: "r" (&v->counter), "Ir" (i)
: "cc");
}
static inline int atomic_sub_return(int i, atomic_t *v)
{
unsigned long tmp;
int result;
smp_mb();
__asm__ __volatile__("@ atomic_sub_return\n"
"1: ldrex %0, [%2]\n"
" sub %0, %0, %3\n"
@ -77,6 +115,8 @@ static inline int atomic_sub_return(int i, atomic_t *v)
: "r" (&v->counter), "Ir" (i)
: "cc");
smp_mb();
return result;
}
@ -84,6 +124,8 @@ static inline int atomic_cmpxchg(atomic_t *ptr, int old, int new)
{
unsigned long oldval, res;
smp_mb();
do {
__asm__ __volatile__("@ atomic_cmpxchg\n"
"ldrex %1, [%2]\n"
@ -95,6 +137,8 @@ static inline int atomic_cmpxchg(atomic_t *ptr, int old, int new)
: "cc");
} while (res);
smp_mb();
return oldval;
}
@ -135,6 +179,7 @@ static inline int atomic_add_return(int i, atomic_t *v)
return val;
}
#define atomic_add(i, v) (void) atomic_add_return(i, v)
static inline int atomic_sub_return(int i, atomic_t *v)
{
@ -148,6 +193,7 @@ static inline int atomic_sub_return(int i, atomic_t *v)
return val;
}
#define atomic_sub(i, v) (void) atomic_sub_return(i, v)
static inline int atomic_cmpxchg(atomic_t *v, int old, int new)
{
@ -187,10 +233,8 @@ static inline int atomic_add_unless(atomic_t *v, int a, int u)
}
#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
#define atomic_add(i, v) (void) atomic_add_return(i, v)
#define atomic_inc(v) (void) atomic_add_return(1, v)
#define atomic_sub(i, v) (void) atomic_sub_return(i, v)
#define atomic_dec(v) (void) atomic_sub_return(1, v)
#define atomic_inc(v) atomic_add(1, v)
#define atomic_dec(v) atomic_sub(1, v)
#define atomic_inc_and_test(v) (atomic_add_return(1, v) == 0)
#define atomic_dec_and_test(v) (atomic_sub_return(1, v) == 0)
@ -200,11 +244,10 @@ static inline int atomic_add_unless(atomic_t *v, int a, int u)
#define atomic_add_negative(i,v) (atomic_add_return(i, v) < 0)
/* Atomic operations are already serializing on ARM */
#define smp_mb__before_atomic_dec() barrier()
#define smp_mb__after_atomic_dec() barrier()
#define smp_mb__before_atomic_inc() barrier()
#define smp_mb__after_atomic_inc() barrier()
#define smp_mb__before_atomic_dec() smp_mb()
#define smp_mb__after_atomic_dec() smp_mb()
#define smp_mb__before_atomic_inc() smp_mb()
#define smp_mb__after_atomic_inc() smp_mb()
#include <asm-generic/atomic.h>
#endif

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@ -248,6 +248,8 @@ static inline unsigned long __xchg(unsigned long x, volatile void *ptr, int size
unsigned int tmp;
#endif
smp_mb();
switch (size) {
#if __LINUX_ARM_ARCH__ >= 6
case 1:
@ -307,6 +309,7 @@ static inline unsigned long __xchg(unsigned long x, volatile void *ptr, int size
__bad_xchg(ptr, size), ret = 0;
break;
}
smp_mb();
return ret;
}
@ -316,6 +319,12 @@ extern void enable_hlt(void);
#include <asm-generic/cmpxchg-local.h>
#if __LINUX_ARM_ARCH__ < 6
#ifdef CONFIG_SMP
#error "SMP is not supported on this platform"
#endif
/*
* cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
* them available.
@ -329,6 +338,173 @@ extern void enable_hlt(void);
#include <asm-generic/cmpxchg.h>
#endif
#else /* __LINUX_ARM_ARCH__ >= 6 */
extern void __bad_cmpxchg(volatile void *ptr, int size);
/*
* cmpxchg only support 32-bits operands on ARMv6.
*/
static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old,
unsigned long new, int size)
{
unsigned long oldval, res;
switch (size) {
#ifdef CONFIG_CPU_32v6K
case 1:
do {
asm volatile("@ __cmpxchg1\n"
" ldrexb %1, [%2]\n"
" mov %0, #0\n"
" teq %1, %3\n"
" strexbeq %0, %4, [%2]\n"
: "=&r" (res), "=&r" (oldval)
: "r" (ptr), "Ir" (old), "r" (new)
: "memory", "cc");
} while (res);
break;
case 2:
do {
asm volatile("@ __cmpxchg1\n"
" ldrexh %1, [%2]\n"
" mov %0, #0\n"
" teq %1, %3\n"
" strexheq %0, %4, [%2]\n"
: "=&r" (res), "=&r" (oldval)
: "r" (ptr), "Ir" (old), "r" (new)
: "memory", "cc");
} while (res);
break;
#endif /* CONFIG_CPU_32v6K */
case 4:
do {
asm volatile("@ __cmpxchg4\n"
" ldrex %1, [%2]\n"
" mov %0, #0\n"
" teq %1, %3\n"
" strexeq %0, %4, [%2]\n"
: "=&r" (res), "=&r" (oldval)
: "r" (ptr), "Ir" (old), "r" (new)
: "memory", "cc");
} while (res);
break;
default:
__bad_cmpxchg(ptr, size);
oldval = 0;
}
return oldval;
}
static inline unsigned long __cmpxchg_mb(volatile void *ptr, unsigned long old,
unsigned long new, int size)
{
unsigned long ret;
smp_mb();
ret = __cmpxchg(ptr, old, new, size);
smp_mb();
return ret;
}
#define cmpxchg(ptr,o,n) \
((__typeof__(*(ptr)))__cmpxchg_mb((ptr), \
(unsigned long)(o), \
(unsigned long)(n), \
sizeof(*(ptr))))
static inline unsigned long __cmpxchg_local(volatile void *ptr,
unsigned long old,
unsigned long new, int size)
{
unsigned long ret;
switch (size) {
#ifndef CONFIG_CPU_32v6K
case 1:
case 2:
ret = __cmpxchg_local_generic(ptr, old, new, size);
break;
#endif /* !CONFIG_CPU_32v6K */
default:
ret = __cmpxchg(ptr, old, new, size);
}
return ret;
}
#define cmpxchg_local(ptr,o,n) \
((__typeof__(*(ptr)))__cmpxchg_local((ptr), \
(unsigned long)(o), \
(unsigned long)(n), \
sizeof(*(ptr))))
#ifdef CONFIG_CPU_32v6K
/*
* Note : ARMv7-M (currently unsupported by Linux) does not support
* ldrexd/strexd. If ARMv7-M is ever supported by the Linux kernel, it should
* not be allowed to use __cmpxchg64.
*/
static inline unsigned long long __cmpxchg64(volatile void *ptr,
unsigned long long old,
unsigned long long new)
{
register unsigned long long oldval asm("r0");
register unsigned long long __old asm("r2") = old;
register unsigned long long __new asm("r4") = new;
unsigned long res;
do {
asm volatile(
" @ __cmpxchg8\n"
" ldrexd %1, %H1, [%2]\n"
" mov %0, #0\n"
" teq %1, %3\n"
" teqeq %H1, %H3\n"
" strexdeq %0, %4, %H4, [%2]\n"
: "=&r" (res), "=&r" (oldval)
: "r" (ptr), "Ir" (__old), "r" (__new)
: "memory", "cc");
} while (res);
return oldval;
}
static inline unsigned long long __cmpxchg64_mb(volatile void *ptr,
unsigned long long old,
unsigned long long new)
{
unsigned long long ret;
smp_mb();
ret = __cmpxchg64(ptr, old, new);
smp_mb();
return ret;
}
#define cmpxchg64(ptr,o,n) \
((__typeof__(*(ptr)))__cmpxchg64_mb((ptr), \
(unsigned long long)(o), \
(unsigned long long)(n)))
#define cmpxchg64_local(ptr,o,n) \
((__typeof__(*(ptr)))__cmpxchg64((ptr), \
(unsigned long long)(o), \
(unsigned long long)(n)))
#else /* !CONFIG_CPU_32v6K */
#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
#endif /* CONFIG_CPU_32v6K */
#endif /* __LINUX_ARM_ARCH__ >= 6 */
#endif /* __ASSEMBLY__ */
#define arch_align_stack(x) (x)

View File

@ -78,6 +78,15 @@ int arm_elf_read_implies_exec(const struct elf32_hdr *x, int executable_stack)
return 1;
if (cpu_architecture() < CPU_ARCH_ARMv6)
return 1;
#if !defined(CONFIG_AEABI) || defined(CONFIG_OABI_COMPAT)
/*
* If we have support for OABI programs, we can never allow NX
* support - our signal syscall restart mechanism relies upon
* being able to execute code placed on the user stack.
*/
return 1;
#else
return 0;
#endif
}
EXPORT_SYMBOL(arm_elf_read_implies_exec);

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@ -815,10 +815,7 @@ __kuser_helper_start:
*/
__kuser_memory_barrier: @ 0xffff0fa0
#if __LINUX_ARM_ARCH__ >= 6 && defined(CONFIG_SMP)
mcr p15, 0, r0, c7, c10, 5 @ dmb
#endif
smp_dmb
usr_ret lr
.align 5

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@ -18,12 +18,14 @@
mov r2, #1
add r1, r1, r0, lsr #3 @ Get byte offset
mov r3, r2, lsl r3 @ create mask
smp_dmb
1: ldrexb r2, [r1]
ands r0, r2, r3 @ save old value of bit
\instr r2, r2, r3 @ toggle bit
strexb ip, r2, [r1]
cmp ip, #0
bne 1b
smp_dmb
cmp r0, #0
movne r0, #1
2: mov pc, lr

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@ -15,10 +15,9 @@
/*
* Memory Map definitions
*/
/* FIXME: Does it really swap SRAM like this? */
#ifdef CONFIG_GEMINI_MEM_SWAP
# define GEMINI_DRAM_BASE 0x00000000
# define GEMINI_SRAM_BASE 0x20000000
# define GEMINI_SRAM_BASE 0x70000000
#else
# define GEMINI_SRAM_BASE 0x00000000
# define GEMINI_DRAM_BASE 0x10000000

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@ -144,6 +144,9 @@ static struct platform_device kirkwood_ge00 = {
.id = 0,
.num_resources = 1,
.resource = kirkwood_ge00_resources,
.dev = {
.coherent_dma_mask = 0xffffffff,
},
};
void __init kirkwood_ge00_init(struct mv643xx_eth_platform_data *eth_data)
@ -202,6 +205,9 @@ static struct platform_device kirkwood_ge01 = {
.id = 1,
.num_resources = 1,
.resource = kirkwood_ge01_resources,
.dev = {
.coherent_dma_mask = 0xffffffff,
},
};
void __init kirkwood_ge01_init(struct mv643xx_eth_platform_data *eth_data)
@ -386,12 +392,10 @@ static struct mv64xxx_i2c_pdata kirkwood_i2c_pdata = {
static struct resource kirkwood_i2c_resources[] = {
{
.name = "i2c",
.start = I2C_PHYS_BASE,
.end = I2C_PHYS_BASE + 0x1f,
.flags = IORESOURCE_MEM,
}, {
.name = "i2c",
.start = IRQ_KIRKWOOD_TWSI,
.end = IRQ_KIRKWOOD_TWSI,
.flags = IORESOURCE_IRQ,

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@ -142,6 +142,8 @@ static unsigned int qnap_ts219_mpp_config[] __initdata = {
MPP1_SPI_MOSI,
MPP2_SPI_SCK,
MPP3_SPI_MISO,
MPP4_SATA1_ACTn,
MPP5_SATA0_ACTn,
MPP8_TW_SDA,
MPP9_TW_SCK,
MPP10_UART0_TXD,
@ -150,10 +152,6 @@ static unsigned int qnap_ts219_mpp_config[] __initdata = {
MPP14_UART1_RXD, /* PIC controller */
MPP15_GPIO, /* USB Copy button */
MPP16_GPIO, /* Reset button */
MPP20_SATA1_ACTn,
MPP21_SATA0_ACTn,
MPP22_SATA1_PRESENTn,
MPP23_SATA0_PRESENTn,
0
};

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@ -82,6 +82,9 @@ static struct platform_device loki_ge0 = {
.id = 0,
.num_resources = 1,
.resource = loki_ge0_resources,
.dev = {
.coherent_dma_mask = 0xffffffff,
},
};
void __init loki_ge0_init(struct mv643xx_eth_platform_data *eth_data)
@ -136,6 +139,9 @@ static struct platform_device loki_ge1 = {
.id = 1,
.num_resources = 1,
.resource = loki_ge1_resources,
.dev = {
.coherent_dma_mask = 0xffffffff,
},
};
void __init loki_ge1_init(struct mv643xx_eth_platform_data *eth_data)

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@ -3,6 +3,11 @@
#include <mach/mfp.h>
#define MFP_DRIVE_VERY_SLOW (0x0 << 13)
#define MFP_DRIVE_SLOW (0x1 << 13)
#define MFP_DRIVE_MEDIUM (0x2 << 13)
#define MFP_DRIVE_FAST (0x3 << 13)
/* GPIO */
#define GPIO0_GPIO MFP_CFG(GPIO0, AF5)
#define GPIO1_GPIO MFP_CFG(GPIO1, AF5)

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@ -3,6 +3,11 @@
#include <mach/mfp.h>
#define MFP_DRIVE_VERY_SLOW (0x0 << 13)
#define MFP_DRIVE_SLOW (0x2 << 13)
#define MFP_DRIVE_MEDIUM (0x4 << 13)
#define MFP_DRIVE_FAST (0x8 << 13)
/* UART2 */
#define GPIO47_UART2_RXD MFP_CFG(GPIO47, AF6)
#define GPIO48_UART2_TXD MFP_CFG(GPIO48, AF6)

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@ -12,16 +12,13 @@
* possible, we make the following compromise:
*
* 1. SLEEP_OE_N will always be programmed to '1' (by MFP_LPM_FLOAT)
* 2. DRIVE strength definitions redefined to include the reserved bit10
* 2. DRIVE strength definitions redefined to include the reserved bit
* - the reserved bit differs between pxa168 and pxa910, and the
* MFP_DRIVE_* macros are individually defined in mfp-pxa{168,910}.h
* 3. Override MFP_CFG() and MFP_CFG_DRV()
* 4. Drop the use of MFP_CFG_LPM() and MFP_CFG_X()
*/
#define MFP_DRIVE_VERY_SLOW (0x0 << 13)
#define MFP_DRIVE_SLOW (0x2 << 13)
#define MFP_DRIVE_MEDIUM (0x4 << 13)
#define MFP_DRIVE_FAST (0x8 << 13)
#undef MFP_CFG
#undef MFP_CFG_DRV
#undef MFP_CFG_LPM

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@ -136,7 +136,7 @@ static struct clock_event_device ckevt = {
.set_mode = timer_set_mode,
};
static cycle_t clksrc_read(void)
static cycle_t clksrc_read(struct clocksource *cs)
{
return timer_read();
}

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@ -321,6 +321,9 @@ static struct platform_device mv78xx0_ge00 = {
.id = 0,
.num_resources = 1,
.resource = mv78xx0_ge00_resources,
.dev = {
.coherent_dma_mask = 0xffffffff,
},
};
void __init mv78xx0_ge00_init(struct mv643xx_eth_platform_data *eth_data)
@ -375,6 +378,9 @@ static struct platform_device mv78xx0_ge01 = {
.id = 1,
.num_resources = 1,
.resource = mv78xx0_ge01_resources,
.dev = {
.coherent_dma_mask = 0xffffffff,
},
};
void __init mv78xx0_ge01_init(struct mv643xx_eth_platform_data *eth_data)
@ -429,6 +435,9 @@ static struct platform_device mv78xx0_ge10 = {
.id = 2,
.num_resources = 1,
.resource = mv78xx0_ge10_resources,
.dev = {
.coherent_dma_mask = 0xffffffff,
},
};
void __init mv78xx0_ge10_init(struct mv643xx_eth_platform_data *eth_data)
@ -496,6 +505,9 @@ static struct platform_device mv78xx0_ge11 = {
.id = 3,
.num_resources = 1,
.resource = mv78xx0_ge11_resources,
.dev = {
.coherent_dma_mask = 0xffffffff,
},
};
void __init mv78xx0_ge11_init(struct mv643xx_eth_platform_data *eth_data)
@ -532,12 +544,10 @@ static struct mv64xxx_i2c_pdata mv78xx0_i2c_0_pdata = {
static struct resource mv78xx0_i2c_0_resources[] = {
{
.name = "i2c 0 base",
.start = I2C_0_PHYS_BASE,
.end = I2C_0_PHYS_BASE + 0x1f,
.flags = IORESOURCE_MEM,
}, {
.name = "i2c 0 irq",
.start = IRQ_MV78XX0_I2C_0,
.end = IRQ_MV78XX0_I2C_0,
.flags = IORESOURCE_IRQ,
@ -567,12 +577,10 @@ static struct mv64xxx_i2c_pdata mv78xx0_i2c_1_pdata = {
static struct resource mv78xx0_i2c_1_resources[] = {
{
.name = "i2c 1 base",
.start = I2C_1_PHYS_BASE,
.end = I2C_1_PHYS_BASE + 0x1f,
.flags = IORESOURCE_MEM,
}, {
.name = "i2c 1 irq",
.start = IRQ_MV78XX0_I2C_1,
.end = IRQ_MV78XX0_I2C_1,
.flags = IORESOURCE_IRQ,

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@ -188,6 +188,9 @@ static struct platform_device orion5x_eth = {
.id = 0,
.num_resources = 1,
.resource = orion5x_eth_resources,
.dev = {
.coherent_dma_mask = 0xffffffff,
},
};
void __init orion5x_eth_init(struct mv643xx_eth_platform_data *eth_data)
@ -248,12 +251,10 @@ static struct mv64xxx_i2c_pdata orion5x_i2c_pdata = {
static struct resource orion5x_i2c_resources[] = {
{
.name = "i2c base",
.start = I2C_PHYS_BASE,
.end = I2C_PHYS_BASE + 0x1f,
.flags = IORESOURCE_MEM,
}, {
.name = "i2c irq",
.start = IRQ_ORION5X_I2C,
.end = IRQ_ORION5X_I2C,
.flags = IORESOURCE_IRQ,

View File

@ -111,9 +111,9 @@ static unsigned long ezx_pin_config[] __initdata = {
GPIO25_SSP1_TXD,
GPIO26_SSP1_RXD,
GPIO24_GPIO, /* pcap chip select */
GPIO1_GPIO, /* pcap interrupt */
GPIO4_GPIO, /* WDI_AP */
GPIO55_GPIO, /* SYS_RESTART */
GPIO1_GPIO | WAKEUP_ON_EDGE_RISE, /* pcap interrupt */
GPIO4_GPIO | MFP_LPM_DRIVE_HIGH, /* WDI_AP */
GPIO55_GPIO | MFP_LPM_DRIVE_HIGH, /* SYS_RESTART */
/* MMC */
GPIO32_MMC_CLK,
@ -144,20 +144,20 @@ static unsigned long ezx_pin_config[] __initdata = {
#if defined(CONFIG_MACH_EZX_A780) || defined(CONFIG_MACH_EZX_E680)
static unsigned long gen1_pin_config[] __initdata = {
/* flip / lockswitch */
GPIO12_GPIO,
GPIO12_GPIO | WAKEUP_ON_EDGE_BOTH,
/* bluetooth (bcm2035) */
GPIO14_GPIO | WAKEUP_ON_LEVEL_HIGH, /* HOSTWAKE */
GPIO14_GPIO | WAKEUP_ON_EDGE_RISE, /* HOSTWAKE */
GPIO48_GPIO, /* RESET */
GPIO28_GPIO, /* WAKEUP */
/* Neptune handshake */
GPIO0_GPIO | WAKEUP_ON_LEVEL_HIGH, /* BP_RDY */
GPIO57_GPIO, /* AP_RDY */
GPIO13_GPIO | WAKEUP_ON_LEVEL_HIGH, /* WDI */
GPIO3_GPIO | WAKEUP_ON_LEVEL_HIGH, /* WDI2 */
GPIO82_GPIO, /* RESET */
GPIO99_GPIO, /* TC_MM_EN */
GPIO0_GPIO | WAKEUP_ON_EDGE_FALL, /* BP_RDY */
GPIO57_GPIO | MFP_LPM_DRIVE_HIGH, /* AP_RDY */
GPIO13_GPIO | WAKEUP_ON_EDGE_BOTH, /* WDI */
GPIO3_GPIO | WAKEUP_ON_EDGE_BOTH, /* WDI2 */
GPIO82_GPIO | MFP_LPM_DRIVE_HIGH, /* RESET */
GPIO99_GPIO | MFP_LPM_DRIVE_HIGH, /* TC_MM_EN */
/* sound */
GPIO52_SSP3_SCLK,
@ -199,21 +199,21 @@ static unsigned long gen1_pin_config[] __initdata = {
defined(CONFIG_MACH_EZX_E2) || defined(CONFIG_MACH_EZX_E6)
static unsigned long gen2_pin_config[] __initdata = {
/* flip / lockswitch */
GPIO15_GPIO,
GPIO15_GPIO | WAKEUP_ON_EDGE_BOTH,
/* EOC */
GPIO10_GPIO,
GPIO10_GPIO | WAKEUP_ON_EDGE_RISE,
/* bluetooth (bcm2045) */
GPIO13_GPIO | WAKEUP_ON_LEVEL_HIGH, /* HOSTWAKE */
GPIO13_GPIO | WAKEUP_ON_EDGE_RISE, /* HOSTWAKE */
GPIO37_GPIO, /* RESET */
GPIO57_GPIO, /* WAKEUP */
/* Neptune handshake */
GPIO0_GPIO | WAKEUP_ON_LEVEL_HIGH, /* BP_RDY */
GPIO96_GPIO, /* AP_RDY */
GPIO3_GPIO | WAKEUP_ON_LEVEL_HIGH, /* WDI */
GPIO116_GPIO, /* RESET */
GPIO0_GPIO | WAKEUP_ON_EDGE_FALL, /* BP_RDY */
GPIO96_GPIO | MFP_LPM_DRIVE_HIGH, /* AP_RDY */
GPIO3_GPIO | WAKEUP_ON_EDGE_FALL, /* WDI */
GPIO116_GPIO | MFP_LPM_DRIVE_HIGH, /* RESET */
GPIO41_GPIO, /* BP_FLASH */
/* sound */

View File

@ -13,8 +13,9 @@ extern void clear_reset_status(unsigned int mask);
/**
* init_gpio_reset() - register GPIO as reset generator
* @gpio: gpio nr
* @output: set gpio as out/low instead of input during normal work
* @output: set gpio as output instead of input during normal work
* @level: output level
*/
extern int init_gpio_reset(int gpio, int output);
extern int init_gpio_reset(int gpio, int output, int level);
#endif /* __ASM_ARCH_RESET_H */

View File

@ -322,6 +322,7 @@ static inline void pxa27x_mfp_init(void) {}
#ifdef CONFIG_PM
static unsigned long saved_gafr[2][4];
static unsigned long saved_gpdr[4];
static unsigned long saved_pgsr[4];
static int pxa2xx_mfp_suspend(struct sys_device *d, pm_message_t state)
{
@ -332,6 +333,7 @@ static int pxa2xx_mfp_suspend(struct sys_device *d, pm_message_t state)
saved_gafr[0][i] = GAFR_L(i);
saved_gafr[1][i] = GAFR_U(i);
saved_gpdr[i] = GPDR(i * 32);
saved_pgsr[i] = PGSR(i);
GPDR(i * 32) = gpdr_lpm[i];
}
@ -346,6 +348,7 @@ static int pxa2xx_mfp_resume(struct sys_device *d)
GAFR_L(i) = saved_gafr[0][i];
GAFR_U(i) = saved_gafr[1][i];
GPDR(i * 32) = saved_gpdr[i];
PGSR(i) = saved_pgsr[i];
}
PSSR = PSSR_RDH | PSSR_PH;
return 0;
@ -374,6 +377,9 @@ static int __init pxa2xx_mfp_init(void)
if (cpu_is_pxa27x())
pxa27x_mfp_init();
/* clear RDH bit to enable GPIO receivers after reset/sleep exit */
PSSR = PSSR_RDH;
/* initialize gafr_run[], pgsr_lpm[] from existing values */
for (i = 0; i <= gpio_to_bank(pxa_last_gpio); i++)
gpdr_lpm[i] = GPDR(i * 32);

View File

@ -62,6 +62,8 @@ static unsigned long palmld_pin_config[] __initdata = {
GPIO29_AC97_SDATA_IN_0,
GPIO30_AC97_SDATA_OUT,
GPIO31_AC97_SYNC,
GPIO89_AC97_SYSCLK,
GPIO95_AC97_nRESET,
/* IrDA */
GPIO108_GPIO, /* ir disable */

View File

@ -64,6 +64,7 @@ static unsigned long palmt5_pin_config[] __initdata = {
GPIO29_AC97_SDATA_IN_0,
GPIO30_AC97_SDATA_OUT,
GPIO31_AC97_SYNC,
GPIO89_AC97_SYSCLK,
GPIO95_AC97_nRESET,
/* IrDA */

View File

@ -65,6 +65,7 @@ static unsigned long palmtx_pin_config[] __initdata = {
GPIO29_AC97_SDATA_IN_0,
GPIO30_AC97_SDATA_OUT,
GPIO31_AC97_SYNC,
GPIO89_AC97_SYSCLK,
GPIO95_AC97_nRESET,
/* IrDA */

View File

@ -20,7 +20,7 @@ static void do_hw_reset(void);
static int reset_gpio = -1;
int init_gpio_reset(int gpio, int output)
int init_gpio_reset(int gpio, int output, int level)
{
int rc;
@ -31,7 +31,7 @@ int init_gpio_reset(int gpio, int output)
}
if (output)
rc = gpio_direction_output(gpio, 0);
rc = gpio_direction_output(gpio, level);
else
rc = gpio_direction_input(gpio);
if (rc) {

View File

@ -531,9 +531,15 @@ static int spitz_ohci_init(struct device *dev)
return gpio_direction_output(SPITZ_GPIO_USB_HOST, 1);
}
static void spitz_ohci_exit(struct device *dev)
{
gpio_free(SPITZ_GPIO_USB_HOST);
}
static struct pxaohci_platform_data spitz_ohci_platform_data = {
.port_mode = PMM_NPS_MODE,
.init = spitz_ohci_init,
.exit = spitz_ohci_exit,
.flags = ENABLE_PORT_ALL | NO_OC_PROTECTION,
.power_budget = 150,
};
@ -731,7 +737,7 @@ static void spitz_restart(char mode, const char *cmd)
static void __init common_init(void)
{
init_gpio_reset(SPITZ_GPIO_ON_RESET, 1);
init_gpio_reset(SPITZ_GPIO_ON_RESET, 1, 0);
pm_power_off = spitz_poweroff;
arm_pm_restart = spitz_restart;

View File

@ -897,7 +897,7 @@ static void __init tosa_init(void)
gpio_set_wake(MFP_PIN_GPIO1, 1);
/* We can't pass to gpio-keys since it will drop the Reset altfunc */
init_gpio_reset(TOSA_GPIO_ON_RESET, 0);
init_gpio_reset(TOSA_GPIO_ON_RESET, 0, 0);
pm_power_off = tosa_poweroff;
arm_pm_restart = tosa_restart;

View File

@ -12,7 +12,7 @@
#
# http://www.arm.linux.org.uk/developer/machines/?action=new
#
# Last update: Mon Mar 23 20:09:01 2009
# Last update: Fri May 29 10:14:20 2009
#
# machine_is_xxx CONFIG_xxxx MACH_TYPE_xxx number
#
@ -916,7 +916,7 @@ nxdb500 MACH_NXDB500 NXDB500 905
apf9328 MACH_APF9328 APF9328 906
omap_wipoq MACH_OMAP_WIPOQ OMAP_WIPOQ 907
omap_twip MACH_OMAP_TWIP OMAP_TWIP 908
palmt650 MACH_PALMT650 PALMT650 909
treo650 MACH_TREO650 TREO650 909
acumen MACH_ACUMEN ACUMEN 910
xp100 MACH_XP100 XP100 911
fs2410 MACH_FS2410 FS2410 912
@ -1232,7 +1232,7 @@ ql202b MACH_QL202B QL202B 1226
vpac270 MACH_VPAC270 VPAC270 1227
rd129 MACH_RD129 RD129 1228
htcwizard MACH_HTCWIZARD HTCWIZARD 1229
xscale_treo680 MACH_XSCALE_TREO680 XSCALE_TREO680 1230
treo680 MACH_TREO680 TREO680 1230
tecon_tmezon MACH_TECON_TMEZON TECON_TMEZON 1231
zylonite MACH_ZYLONITE ZYLONITE 1233
gene1270 MACH_GENE1270 GENE1270 1234
@ -1418,10 +1418,10 @@ looxc550 MACH_LOOXC550 LOOXC550 1417
cnty_titan MACH_CNTY_TITAN CNTY_TITAN 1418
app3xx MACH_APP3XX APP3XX 1419
sideoatsgrama MACH_SIDEOATSGRAMA SIDEOATSGRAMA 1420
palmtreo700p MACH_PALMTREO700P PALMTREO700P 1421
palmtreo700w MACH_PALMTREO700W PALMTREO700W 1422
palmtreo750 MACH_PALMTREO750 PALMTREO750 1423
palmtreo755p MACH_PALMTREO755P PALMTREO755P 1424
treo700p MACH_TREO700P TREO700P 1421
treo700w MACH_TREO700W TREO700W 1422
treo750 MACH_TREO750 TREO750 1423
treo755p MACH_TREO755P TREO755P 1424
ezreganut9200 MACH_EZREGANUT9200 EZREGANUT9200 1425
sarge MACH_SARGE SARGE 1426
a696 MACH_A696 A696 1427
@ -1721,7 +1721,7 @@ sapphire MACH_SAPPHIRE SAPPHIRE 1729
csb637xo MACH_CSB637XO CSB637XO 1730
evisiong MACH_EVISIONG EVISIONG 1731
stmp37xx MACH_STMP37XX STMP37XX 1732
stmp378x MACH_STMP38XX STMP38XX 1733
stmp378x MACH_STMP378X STMP378X 1733
tnt MACH_TNT TNT 1734
tbxt MACH_TBXT TBXT 1735
playmate MACH_PLAYMATE PLAYMATE 1736
@ -1817,7 +1817,7 @@ smdkc100 MACH_SMDKC100 SMDKC100 1826
tavorevb MACH_TAVOREVB TAVOREVB 1827
saar MACH_SAAR SAAR 1828
deister_eyecam MACH_DEISTER_EYECAM DEISTER_EYECAM 1829
at91sam9m10ek MACH_AT91SAM9M10EK AT91SAM9M10EK 1830
at91sam9m10g45ek MACH_AT91SAM9M10G45EK AT91SAM9M10G45EK 1830
linkstation_produo MACH_LINKSTATION_PRODUO LINKSTATION_PRODUO 1831
hit_b0 MACH_HIT_B0 HIT_B0 1832
adx_rmu MACH_ADX_RMU ADX_RMU 1833
@ -2132,3 +2132,116 @@ apollo MACH_APOLLO APOLLO 2141
at91cap9stk MACH_AT91CAP9STK AT91CAP9STK 2142
spc300 MACH_SPC300 SPC300 2143
eko MACH_EKO EKO 2144
ccw9m2443 MACH_CCW9M2443 CCW9M2443 2145
ccw9m2443js MACH_CCW9M2443JS CCW9M2443JS 2146
m2m_router_device MACH_M2M_ROUTER_DEVICE M2M_ROUTER_DEVICE 2147
str9104nas MACH_STAR9104NAS STAR9104NAS 2148
pca100 MACH_PCA100 PCA100 2149
z3_dm365_mod_01 MACH_Z3_DM365_MOD_01 Z3_DM365_MOD_01 2150
hipox MACH_HIPOX HIPOX 2151
omap3_piteds MACH_OMAP3_PITEDS OMAP3_PITEDS 2152
bm150r MACH_BM150R BM150R 2153
tbone MACH_TBONE TBONE 2154
merlin MACH_MERLIN MERLIN 2155
falcon MACH_FALCON FALCON 2156
davinci_da850_evm MACH_DAVINCI_DA850_EVM DAVINCI_DA850_EVM 2157
s5p6440 MACH_S5P6440 S5P6440 2158
at91sam9g10ek MACH_AT91SAM9G10EK AT91SAM9G10EK 2159
omap_4430sdp MACH_OMAP_4430SDP OMAP_4430SDP 2160
lpc313x MACH_LPC313X LPC313X 2161
magx_zn5 MACH_MAGX_ZN5 MAGX_ZN5 2162
magx_em30 MACH_MAGX_EM30 MAGX_EM30 2163
magx_ve66 MACH_MAGX_VE66 MAGX_VE66 2164
meesc MACH_MEESC MEESC 2165
otc570 MACH_OTC570 OTC570 2166
bcu2412 MACH_BCU2412 BCU2412 2167
beacon MACH_BEACON BEACON 2168
actia_tgw MACH_ACTIA_TGW ACTIA_TGW 2169
e4430 MACH_E4430 E4430 2170
ql300 MACH_QL300 QL300 2171
btmavb101 MACH_BTMAVB101 BTMAVB101 2172
btmawb101 MACH_BTMAWB101 BTMAWB101 2173
sq201 MACH_SQ201 SQ201 2174
quatro45xx MACH_QUATRO45XX QUATRO45XX 2175
openpad MACH_OPENPAD OPENPAD 2176
tx25 MACH_TX25 TX25 2177
omap3_torpedo MACH_OMAP3_TORPEDO OMAP3_TORPEDO 2178
htcraphael_k MACH_HTCRAPHAEL_K HTCRAPHAEL_K 2179
lal43 MACH_LAL43 LAL43 2181
htcraphael_cdma500 MACH_HTCRAPHAEL_CDMA500 HTCRAPHAEL_CDMA500 2182
anw6410 MACH_ANW6410 ANW6410 2183
htcprophet MACH_HTCPROPHET HTCPROPHET 2185
cfa_10022 MACH_CFA_10022 CFA_10022 2186
imx27_visstrim_m10 MACH_IMX27_VISSTRIM_M10 IMX27_VISSTRIM_M10 2187
px2imx27 MACH_PX2IMX27 PX2IMX27 2188
stm3210e_eval MACH_STM3210E_EVAL STM3210E_EVAL 2189
dvs10 MACH_DVS10 DVS10 2190
portuxg20 MACH_PORTUXG20 PORTUXG20 2191
arm_spv MACH_ARM_SPV ARM_SPV 2192
smdkc110 MACH_SMDKC110 SMDKC110 2193
cabespresso MACH_CABESPRESSO CABESPRESSO 2194
hmc800 MACH_HMC800 HMC800 2195
sholes MACH_SHOLES SHOLES 2196
btmxc31 MACH_BTMXC31 BTMXC31 2197
dt501 MACH_DT501 DT501 2198
ktx MACH_KTX KTX 2199
omap3517evm MACH_OMAP3517EVM OMAP3517EVM 2200
netspace_v2 MACH_NETSPACE_V2 NETSPACE_V2 2201
netspace_max_v2 MACH_NETSPACE_MAX_V2 NETSPACE_MAX_V2 2202
d2net_v2 MACH_D2NET_V2 D2NET_V2 2203
net2big_v2 MACH_NET2BIG_V2 NET2BIG_V2 2204
net4big_v2 MACH_NET4BIG_V2 NET4BIG_V2 2205
net5big_v2 MACH_NET5BIG_V2 NET5BIG_V2 2206
endb2443 MACH_ENDB2443 ENDB2443 2207
inetspace_v2 MACH_INETSPACE_V2 INETSPACE_V2 2208
tros MACH_TROS TROS 2209
pelco_homer MACH_PELCO_HOMER PELCO_HOMER 2210
ofsp8 MACH_OFSP8 OFSP8 2211
at91sam9g45ekes MACH_AT91SAM9G45EKES AT91SAM9G45EKES 2212
guf_cupid MACH_GUF_CUPID GUF_CUPID 2213
eab1r MACH_EAB1R EAB1R 2214
desirec MACH_DESIREC DESIREC 2215
cordoba MACH_CORDOBA CORDOBA 2216
irvine MACH_IRVINE IRVINE 2217
sff772 MACH_SFF772 SFF772 2218
pelco_milano MACH_PELCO_MILANO PELCO_MILANO 2219
pc7302 MACH_PC7302 PC7302 2220
bip6000 MACH_BIP6000 BIP6000 2221
silvermoon MACH_SILVERMOON SILVERMOON 2222
vc0830 MACH_VC0830 VC0830 2223
dt430 MACH_DT430 DT430 2224
ji42pf MACH_JI42PF JI42PF 2225
gnet_ksm MACH_GNET_KSM GNET_KSM 2226
gnet_sgm MACH_GNET_SGM GNET_SGM 2227
gnet_sgr MACH_GNET_SGR GNET_SGR 2228
omap3_icetekevm MACH_OMAP3_ICETEKEVM OMAP3_ICETEKEVM 2229
pnp MACH_PNP PNP 2230
ctera_2bay_k MACH_CTERA_2BAY_K CTERA_2BAY_K 2231
ctera_2bay_u MACH_CTERA_2BAY_U CTERA_2BAY_U 2232
sas_c MACH_SAS_C SAS_C 2233
vma2315 MACH_VMA2315 VMA2315 2234
vcs MACH_VCS VCS 2235
spear600 MACH_SPEAR600 SPEAR600 2236
spear300 MACH_SPEAR300 SPEAR300 2237
spear1300 MACH_SPEAR1300 SPEAR1300 2238
lilly1131 MACH_LILLY1131 LILLY1131 2239
arvoo_ax301 MACH_ARVOO_AX301 ARVOO_AX301 2240
mapphone MACH_MAPPHONE MAPPHONE 2241
legend MACH_LEGEND LEGEND 2242
salsa MACH_SALSA SALSA 2243
lounge MACH_LOUNGE LOUNGE 2244
vision MACH_VISION VISION 2245
vmb20 MACH_VMB20 VMB20 2246
hy2410 MACH_HY2410 HY2410 2247
hy9315 MACH_HY9315 HY9315 2248
bullwinkle MACH_BULLWINKLE BULLWINKLE 2249
arm_ultimator2 MACH_ARM_ULTIMATOR2 ARM_ULTIMATOR2 2250
vs_v210 MACH_VS_V210 VS_V210 2252
vs_v212 MACH_VS_V212 VS_V212 2253
hmt MACH_HMT HMT 2254
suen3 MACH_SUEN3 SUEN3 2255
vesper MACH_VESPER VESPER 2256
str9 MACH_STR9 STR9 2257
omap3_wl_ff MACH_OMAP3_WL_FF OMAP3_WL_FF 2258
simcom MACH_SIMCOM SIMCOM 2259
mcwebio MACH_MCWEBIO MCWEBIO 2260