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PCI: xilinx-nwl: Use pci_is_root_bus() to check if bus is root bus

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Use pci_is_root_bus() rather than tracking the root bus number to
determine if the bus is the root bus or not. This removes storing
duplicated data as well as the need for the host bridge driver to have
to care about the bus numbers in most cases.

There was also a bug that the pci_host_bridge.busnr is set from
root_busno, but root_busno is never set which means the root bus number
is always 0 even if the DT said something else.

Link: https://lore.kernel.org/r/20200722022514.1283916-8-robh@kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Michal Simek <michal.simek@xilinx.com>
This commit is contained in:
Rob Herring 2020-07-21 20:25:02 -06:00 committed by Lorenzo Pieralisi
parent 388637d972
commit 77fc9aa969
1 changed files with 3 additions and 7 deletions
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10
drivers/pci/controller/pcie-xilinx-nwl.c
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@ -166,7 +166,6 @@ struct nwl_pcie {
int irq_misc;
u32 ecam_value;
u8 last_busno;
u8 root_busno;
struct nwl_msi msi;
struct irq_domain *legacy_irq_domain;
raw_spinlock_t leg_mask_lock;
@ -217,13 +216,11 @@ static bool nwl_pcie_valid_device(struct pci_bus *bus, unsigned int devfn)
struct nwl_pcie *pcie = bus->sysdata;
/* Check link before accessing downstream ports */
if (bus->number != pcie->root_busno) {
if (!pci_is_root_bus(bus)) {
if (!nwl_pcie_link_up(pcie))
return false;
}
/* Only one device down on each root port */
if (bus->number == pcie->root_busno && devfn > 0)
} else if (devfn > 0)
/* Only one device down on each root port */
return false;
return true;
@ -855,7 +852,6 @@ static int nwl_pcie_probe(struct platform_device *pdev)
}
bridge->sysdata = pcie;
bridge->busnr = pcie->root_busno;
bridge->ops = &nwl_pcie_ops;
bridge->map_irq = of_irq_parse_and_map_pci;
bridge->swizzle_irq = pci_common_swizzle;