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ARM: ux500: move last AB8505 set-up to DT
This moves the set-up of the HREF500 with its AB8505 ASIC to a device tree include. Since there is not yet any device tree for this board the DTSI is currently unused. After this delete the board file for pins for good and migration of pins to the device tree is complete. Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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240
arch/arm/boot/dts/ste-href-ab8505.dtsi
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240
arch/arm/boot/dts/ste-href-ab8505.dtsi
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@ -0,0 +1,240 @@
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/*
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* Copyright 2014 Linaro Ltd.
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*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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/ {
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soc {
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prcmu@80157000 {
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ab8505 {
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ab8505-gpio {
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/* Hog a few default settings */
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pinctrl-names = "default";
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pinctrl-0 = <&gpio2_default_mode>,
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<&gpio10_default_mode>,
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<&gpio11_default_mode>,
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<&gpio13_default_mode>,
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<&gpio34_default_mode>,
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<&gpio50_default_mode>,
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<&pwm_default_mode>,
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<&adi2_default_mode>,
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<&modsclsda_default_mode>,
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<&resethw_default_mode>,
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<&service_default_mode>;
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/*
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* Pins 2, 10, 11, 13, 34 and 50
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* are muxed in as GPIO, and configured as INPUT PULL DOWN
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*/
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gpio2 {
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gpio2_default_mode: gpio2_default {
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default_mux {
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ste,function = "gpio";
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ste,pins = "gpio2_a_1";
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};
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default_cfg {
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ste,pins = "GPIO2_R5";
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input-enable;
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bias-pull-down;
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};
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};
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};
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gpio10 {
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gpio10_default_mode: gpio10_default {
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default_mux {
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ste,function = "gpio";
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ste,pins = "gpio10_d_1";
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};
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default_cfg {
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ste,pins = "GPIO10_B16";
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input-enable;
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bias-pull-down;
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};
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};
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};
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gpio11 {
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gpio11_default_mode: gpio11_default {
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default_mux {
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ste,function = "gpio";
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ste,pins = "gpio11_d_1";
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};
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default_cfg {
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ste,pins = "GPIO11_B17";
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input-enable;
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bias-pull-down;
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};
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};
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};
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gpio13 {
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gpio13_default_mode: gpio13_default {
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default_mux {
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ste,function = "gpio";
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ste,pins = "gpio13_d_1";
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};
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default_cfg {
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ste,pins = "GPIO13_D17";
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input-enable;
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bias-disable;
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};
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};
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};
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gpio34 {
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gpio34_default_mode: gpio34_default {
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default_mux {
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ste,function = "gpio";
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ste,pins = "gpio34_a_1";
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};
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default_cfg {
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ste,pins = "GPIO34_H14";
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input-enable;
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bias-pull-down;
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};
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};
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};
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gpio50 {
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gpio50_default_mode: gpio50_default {
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default_mux {
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ste,function = "gpio";
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ste,pins = "gpio50_d_1";
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};
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default_cfg {
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ste,pins = "GPIO50_L4";
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input-enable;
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bias-disable;
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};
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};
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};
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/* This sets up the PWM pin 14 */
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pwm {
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pwm_default_mode: pwm_default {
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default_mux {
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ste,function = "pwmout";
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ste,pins = "pwmout1_d_1";
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};
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default_cfg {
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ste,pins = "GPIO14_C16";
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input-enable;
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bias-pull-down;
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};
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};
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};
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/* This sets up audio interface 2 */
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adi2 {
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adi2_default_mode: adi2_default {
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default_mux {
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ste,function = "adi2";
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ste,pins = "adi2_d_1";
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};
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default_cfg {
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ste,pins = "GPIO17_P2",
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"GPIO18_N3",
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"GPIO19_T1",
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"GPIO20_P3";
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input-enable;
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bias-pull-down;
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};
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};
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};
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/* Modem I2C setup (SCL and SDA pins) */
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modsclsda {
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modsclsda_default_mode: modsclsda_default {
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default_mux {
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ste,function = "modsclsda";
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ste,pins = "modsclsda_d_1";
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};
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default_cfg {
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ste,pins = "GPIO40_J15",
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"GPIO41_J14";
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input-enable;
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bias-pull-down;
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};
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};
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};
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resethw {
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resethw_default_mode: resethw_default {
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default_mux {
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ste,function = "resethw";
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ste,pins = "resethw_d_1";
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};
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default_cfg {
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ste,pins = "GPIO52_D16";
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input-enable;
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bias-pull-down;
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};
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};
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};
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service {
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service_default_mode: service_default {
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default_mux {
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ste,function = "service";
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ste,pins = "service_d_1";
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};
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default_cfg {
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ste,pins = "GPIO53_D15";
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input-enable;
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bias-pull-down;
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};
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};
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};
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/*
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* Clock output pins associated with regulators.
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*/
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sysclkreq2 {
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sysclkreq2_default_mode: sysclkreq2_default {
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default_mux {
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ste,function = "sysclkreq";
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ste,pins = "sysclkreq2_d_1";
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};
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default_cfg {
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ste,pins = "GPIO1_N4";
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input-enable;
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bias-disable;
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};
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};
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sysclkreq2_sleep_mode: sysclkreq2_sleep {
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default_mux {
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ste,function = "gpio";
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ste,pins = "gpio1_a_1";
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};
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default_cfg {
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ste,pins = "GPIO1_N4";
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input-enable;
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bias-pull-down;
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};
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};
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};
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sysclkreq4 {
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sysclkreq4_default_mode: sysclkreq4_default {
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default_mux {
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ste,function = "sysclkreq";
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ste,pins = "sysclkreq4_d_1";
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};
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default_cfg {
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ste,pins = "GPIO3_P5";
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input-enable;
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bias-disable;
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};
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};
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sysclkreq4_sleep_mode: sysclkreq4_sleep {
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default_mux {
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ste,function = "gpio";
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ste,pins = "gpio3_a_1";
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};
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default_cfg {
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ste,pins = "GPIO3_P5";
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input-enable;
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bias-pull-down;
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};
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};
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};
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};
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};
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};
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};
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};
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@ -7,7 +7,6 @@ obj-$(CONFIG_CACHE_L2X0) += cache-l2x0.o
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obj-$(CONFIG_UX500_SOC_DB8500) += cpu-db8500.o
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obj-$(CONFIG_MACH_MOP500) += board-mop500-sdi.o \
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board-mop500-regulators.o \
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board-mop500-pins.o \
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board-mop500-audio.o
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obj-$(CONFIG_SMP) += platsmp.o headsmp.o
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obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
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@ -1,93 +0,0 @@
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/*
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* Copyright (C) ST-Ericsson SA 2010
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*
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* License terms: GNU General Public License (GPL) version 2
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/bug.h>
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#include <linux/string.h>
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#include <linux/pinctrl/machine.h>
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#include <linux/pinctrl/pinconf-generic.h>
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#include <asm/mach-types.h>
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#include "board-mop500.h"
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/* These simply sets bias for pins */
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#define BIAS(a,b) static unsigned long a[] = { b }
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BIAS(abx500_in_pd, PIN_CONF_PACKED(PIN_CONFIG_BIAS_PULL_DOWN, 1));
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BIAS(abx500_in_nopull, PIN_CONF_PACKED(PIN_CONFIG_BIAS_PULL_DOWN, 0));
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#define AB8505_MUX_HOG(group, func) \
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PIN_MAP_MUX_GROUP_HOG_DEFAULT("pinctrl-ab8505.0", group, func)
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#define AB8505_PIN_HOG(pin, conf) \
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PIN_MAP_CONFIGS_PIN_HOG_DEFAULT("pinctrl-ab8505.0", pin, abx500_##conf)
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#define AB8505_MUX_STATE(group, func, dev, state) \
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PIN_MAP_MUX_GROUP(dev, state, "pinctrl-ab8505.0", group, func)
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#define AB8505_PIN_STATE(pin, conf, dev, state) \
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PIN_MAP_CONFIGS_PIN(dev, state, "pinctrl-ab8505.0", pin, abx500_##conf)
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static struct pinctrl_map __initdata ab8505_pinmap[] = {
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/* Sysclkreq2 */
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AB8505_MUX_STATE("sysclkreq2_d_1", "sysclkreq", "regulator.36", PINCTRL_STATE_DEFAULT),
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AB8505_PIN_STATE("GPIO1_N4", in_nopull, "regulator.36", PINCTRL_STATE_DEFAULT),
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/* sysclkreq2 disable, mux in gpio configured in input pulldown */
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AB8505_MUX_STATE("gpio1_a_1", "gpio", "regulator.36", PINCTRL_STATE_SLEEP),
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AB8505_PIN_STATE("GPIO1_N4", in_pd, "regulator.36", PINCTRL_STATE_SLEEP),
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/* pins 2 is muxed in GPIO, configured in INPUT PULL DOWN */
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AB8505_MUX_HOG("gpio2_a_1", "gpio"),
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AB8505_PIN_HOG("GPIO2_R5", in_pd),
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/* Sysclkreq4 */
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AB8505_MUX_STATE("sysclkreq4_d_1", "sysclkreq", "regulator.37", PINCTRL_STATE_DEFAULT),
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AB8505_PIN_STATE("GPIO3_P5", in_nopull, "regulator.37", PINCTRL_STATE_DEFAULT),
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/* sysclkreq4 disable, mux in gpio configured in input pulldown */
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AB8505_MUX_STATE("gpio3_a_1", "gpio", "regulator.37", PINCTRL_STATE_SLEEP),
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AB8505_PIN_STATE("GPIO3_P5", in_pd, "regulator.37", PINCTRL_STATE_SLEEP),
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AB8505_MUX_HOG("gpio10_d_1", "gpio"),
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AB8505_PIN_HOG("GPIO10_B16", in_pd),
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AB8505_MUX_HOG("gpio11_d_1", "gpio"),
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AB8505_PIN_HOG("GPIO11_B17", in_pd),
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AB8505_MUX_HOG("gpio13_d_1", "gpio"),
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AB8505_PIN_HOG("GPIO13_D17", in_nopull),
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AB8505_MUX_HOG("pwmout1_d_1", "pwmout"),
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AB8505_PIN_HOG("GPIO14_C16", in_pd),
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AB8505_MUX_HOG("adi2_d_1", "adi2"),
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AB8505_PIN_HOG("GPIO17_P2", in_pd),
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AB8505_PIN_HOG("GPIO18_N3", in_pd),
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AB8505_PIN_HOG("GPIO19_T1", in_pd),
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AB8505_PIN_HOG("GPIO20_P3", in_pd),
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AB8505_MUX_HOG("gpio34_a_1", "gpio"),
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AB8505_PIN_HOG("GPIO34_H14", in_pd),
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AB8505_MUX_HOG("modsclsda_d_1", "modsclsda"),
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AB8505_PIN_HOG("GPIO40_J15", in_pd),
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AB8505_PIN_HOG("GPIO41_J14", in_pd),
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AB8505_MUX_HOG("gpio50_d_1", "gpio"),
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AB8505_PIN_HOG("GPIO50_L4", in_nopull),
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AB8505_MUX_HOG("resethw_d_1", "resethw"),
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AB8505_PIN_HOG("GPIO52_D16", in_pd),
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AB8505_MUX_HOG("service_d_1", "service"),
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AB8505_PIN_HOG("GPIO53_D15", in_pd),
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};
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void __init mop500_pinmaps_init(void)
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{
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if (machine_is_u8520())
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pinctrl_register_mappings(ab8505_pinmap,
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ARRAY_SIZE(ab8505_pinmap));
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}
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@ -88,6 +88,4 @@ extern struct msp_i2s_platform_data msp1_platform_data;
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extern struct msp_i2s_platform_data msp2_platform_data;
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extern struct msp_i2s_platform_data msp3_platform_data;
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void __init mop500_pinmaps_init(void);
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#endif
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@ -191,9 +191,6 @@ static void __init u8500_init_machine(void)
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{
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struct device *parent = db8500_soc_device_init();
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/* Pinmaps must be in place before devices register */
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if (of_machine_is_compatible("st-ericsson,mop500"))
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mop500_pinmaps_init();
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/* automatically probe child nodes of dbx5x0 devices */
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if (of_machine_is_compatible("st-ericsson,u8540"))
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of_platform_populate(NULL, u8500_local_bus_nodes,
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