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drm/amdgpu: reserve vram for memory training(v4)
memory training using specific fixed vram segment, reserve these segments before anyone may allocate it. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Luben Tuikov <luben.tuikov@amd.com> Signed-off-by: Tianci.Yin <tianci.yin@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -1667,6 +1667,88 @@ static int amdgpu_ttm_fw_reserve_vram_init(struct amdgpu_device *adev)
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&adev->fw_vram_usage.va);
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}
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/*
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* Memoy training reservation functions
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*/
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/**
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* amdgpu_ttm_training_reserve_vram_fini - free memory training reserved vram
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*
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* @adev: amdgpu_device pointer
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*
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* free memory training reserved vram if it has been reserved.
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*/
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static int amdgpu_ttm_training_reserve_vram_fini(struct amdgpu_device *adev)
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{
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struct psp_memory_training_context *ctx = &adev->psp.mem_train_ctx;
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ctx->init = PSP_MEM_TRAIN_NOT_SUPPORT;
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amdgpu_bo_free_kernel(&ctx->c2p_bo, NULL, NULL);
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ctx->c2p_bo = NULL;
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amdgpu_bo_free_kernel(&ctx->p2c_bo, NULL, NULL);
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ctx->p2c_bo = NULL;
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return 0;
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}
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/**
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* amdgpu_ttm_training_reserve_vram_init - create bo vram reservation from memory training
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*
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* @adev: amdgpu_device pointer
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*
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* create bo vram reservation from memory training.
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*/
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static int amdgpu_ttm_training_reserve_vram_init(struct amdgpu_device *adev)
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{
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int ret;
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struct psp_memory_training_context *ctx = &adev->psp.mem_train_ctx;
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memset(ctx, 0, sizeof(*ctx));
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if (!adev->fw_vram_usage.mem_train_support) {
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DRM_DEBUG("memory training does not support!\n");
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return 0;
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}
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ctx->c2p_train_data_offset = adev->fw_vram_usage.mem_train_fb_loc;
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ctx->p2c_train_data_offset = (adev->gmc.mc_vram_size - GDDR6_MEM_TRAINING_OFFSET);
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ctx->train_data_size = GDDR6_MEM_TRAINING_DATA_SIZE_IN_BYTES;
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DRM_DEBUG("train_data_size:%llx,p2c_train_data_offset:%llx,c2p_train_data_offset:%llx.\n",
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ctx->train_data_size,
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ctx->p2c_train_data_offset,
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ctx->c2p_train_data_offset);
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ret = amdgpu_bo_create_kernel_at(adev,
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ctx->p2c_train_data_offset,
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ctx->train_data_size,
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AMDGPU_GEM_DOMAIN_VRAM,
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&ctx->p2c_bo,
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NULL);
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if (ret) {
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DRM_ERROR("alloc p2c_bo failed(%d)!\n", ret);
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goto Err_out;
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}
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ret = amdgpu_bo_create_kernel_at(adev,
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ctx->c2p_train_data_offset,
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ctx->train_data_size,
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AMDGPU_GEM_DOMAIN_VRAM,
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&ctx->c2p_bo,
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NULL);
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if (ret) {
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DRM_ERROR("alloc c2p_bo failed(%d)!\n", ret);
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goto Err_out;
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}
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ctx->init = PSP_MEM_TRAIN_RESERVE_SUCCESS;
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return 0;
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Err_out:
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amdgpu_ttm_training_reserve_vram_fini(adev);
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return ret;
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}
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/**
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* amdgpu_ttm_init - Init the memory management (ttm) as well as various
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* gtt/vram related fields.
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@ -1740,6 +1822,14 @@ int amdgpu_ttm_init(struct amdgpu_device *adev)
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return r;
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}
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/*
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*The reserved vram for memory training must be pinned to the specified
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*place on the VRAM, so reserve it early.
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*/
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r = amdgpu_ttm_training_reserve_vram_init(adev);
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if (r)
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return r;
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/* allocate memory as required for VGA
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* This is used for VGA emulation and pre-OS scanout buffers to
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* avoid display artifacts while transitioning between pre-OS
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@ -1842,6 +1932,7 @@ void amdgpu_ttm_fini(struct amdgpu_device *adev)
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return;
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amdgpu_ttm_debugfs_fini(adev);
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amdgpu_ttm_training_reserve_vram_fini(adev);
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amdgpu_ttm_fw_reserve_vram_fini(adev);
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if (adev->mman.aper_base_kaddr)
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iounmap(adev->mman.aper_base_kaddr);
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