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mlxsw: reg: Add QoS Policer Configuration Register
The QPCR register is used to create and control policers. A policer can discard or change the color of packets that are trapped by a specific trap. Signed-off-by: Nogah Frankel <nogahf@mellanox.com> Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Nogah Frankel
David S. Miller
parent
2b77958bf4
commit
76a4c7d32a
@ -1757,6 +1757,146 @@ static inline void mlxsw_reg_spvmlr_pack(char *payload, u8 local_port,
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}
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}
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/* QPCR - QoS Policer Configuration Register
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* -----------------------------------------
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* The QPCR register is used to create policers - that limit
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* the rate of bytes or packets via some trap group.
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*/
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#define MLXSW_REG_QPCR_ID 0x4004
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#define MLXSW_REG_QPCR_LEN 0x28
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MLXSW_REG_DEFINE(qpcr, MLXSW_REG_QPCR_ID, MLXSW_REG_QPCR_LEN);
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enum mlxsw_reg_qpcr_g {
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MLXSW_REG_QPCR_G_GLOBAL = 2,
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MLXSW_REG_QPCR_G_STORM_CONTROL = 3,
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};
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/* reg_qpcr_g
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* The policer type.
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* Access: Index
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*/
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MLXSW_ITEM32(reg, qpcr, g, 0x00, 14, 2);
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/* reg_qpcr_pid
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* Policer ID.
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* Access: Index
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*/
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MLXSW_ITEM32(reg, qpcr, pid, 0x00, 0, 14);
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/* reg_qpcr_color_aware
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* Is the policer aware of colors.
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* Must be 0 (unaware) for cpu port.
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* Access: RW for unbounded policer. RO for bounded policer.
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*/
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MLXSW_ITEM32(reg, qpcr, color_aware, 0x04, 15, 1);
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/* reg_qpcr_bytes
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* Is policer limit is for bytes per sec or packets per sec.
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* 0 - packets
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* 1 - bytes
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* Access: RW for unbounded policer. RO for bounded policer.
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*/
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MLXSW_ITEM32(reg, qpcr, bytes, 0x04, 14, 1);
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enum mlxsw_reg_qpcr_ir_units {
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MLXSW_REG_QPCR_IR_UNITS_M,
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MLXSW_REG_QPCR_IR_UNITS_K,
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};
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/* reg_qpcr_ir_units
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* Policer's units for cir and eir fields (for bytes limits only)
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* 1 - 10^3
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* 0 - 10^6
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* Access: OP
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*/
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MLXSW_ITEM32(reg, qpcr, ir_units, 0x04, 12, 1);
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enum mlxsw_reg_qpcr_rate_type {
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MLXSW_REG_QPCR_RATE_TYPE_SINGLE = 1,
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MLXSW_REG_QPCR_RATE_TYPE_DOUBLE = 2,
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};
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/* reg_qpcr_rate_type
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* Policer can have one limit (single rate) or 2 limits with specific operation
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* for packets that exceed the lower rate but not the upper one.
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* (For cpu port must be single rate)
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* Access: RW for unbounded policer. RO for bounded policer.
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*/
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MLXSW_ITEM32(reg, qpcr, rate_type, 0x04, 8, 2);
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/* reg_qpc_cbs
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* Policer's committed burst size.
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* The policer is working with time slices of 50 nano sec. By default every
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* slice is granted the proportionate share of the committed rate. If we want to
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* allow a slice to exceed that share (while still keeping the rate per sec) we
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* can allow burst. The burst size is between the default proportionate share
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* (and no lower than 8) to 32Gb. (Even though giving a number higher than the
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* committed rate will result in exceeding the rate). The burst size must be a
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* log of 2 and will be determined by 2^cbs.
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* Access: RW
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*/
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MLXSW_ITEM32(reg, qpcr, cbs, 0x08, 24, 6);
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/* reg_qpcr_cir
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* Policer's committed rate.
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* The rate used for sungle rate, the lower rate for double rate.
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* For bytes limits, the rate will be this value * the unit from ir_units.
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* (Resolution error is up to 1%).
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* Access: RW
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*/
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MLXSW_ITEM32(reg, qpcr, cir, 0x0C, 0, 32);
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/* reg_qpcr_eir
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* Policer's exceed rate.
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* The higher rate for double rate, reserved for single rate.
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* Lower rate for double rate policer.
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* For bytes limits, the rate will be this value * the unit from ir_units.
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* (Resolution error is up to 1%).
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* Access: RW
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*/
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MLXSW_ITEM32(reg, qpcr, eir, 0x10, 0, 32);
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#define MLXSW_REG_QPCR_DOUBLE_RATE_ACTION 2
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/* reg_qpcr_exceed_action.
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* What to do with packets between the 2 limits for double rate.
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* Access: RW for unbounded policer. RO for bounded policer.
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*/
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MLXSW_ITEM32(reg, qpcr, exceed_action, 0x14, 0, 4);
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enum mlxsw_reg_qpcr_action {
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/* Discard */
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MLXSW_REG_QPCR_ACTION_DISCARD = 1,
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/* Forward and set color to red.
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* If the packet is intended to cpu port, it will be dropped.
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*/
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MLXSW_REG_QPCR_ACTION_FORWARD = 2,
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};
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/* reg_qpcr_violate_action
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* What to do with packets that cross the cir limit (for single rate) or the eir
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* limit (for double rate).
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* Access: RW for unbounded policer. RO for bounded policer.
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*/
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MLXSW_ITEM32(reg, qpcr, violate_action, 0x18, 0, 4);
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static inline void mlxsw_reg_qpcr_pack(char *payload, u16 pid,
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enum mlxsw_reg_qpcr_ir_units ir_units,
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bool bytes, u32 cir, u16 cbs)
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{
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MLXSW_REG_ZERO(qpcr, payload);
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mlxsw_reg_qpcr_pid_set(payload, pid);
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mlxsw_reg_qpcr_g_set(payload, MLXSW_REG_QPCR_G_GLOBAL);
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mlxsw_reg_qpcr_rate_type_set(payload, MLXSW_REG_QPCR_RATE_TYPE_SINGLE);
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mlxsw_reg_qpcr_violate_action_set(payload,
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MLXSW_REG_QPCR_ACTION_DISCARD);
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mlxsw_reg_qpcr_cir_set(payload, cir);
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mlxsw_reg_qpcr_ir_units_set(payload, ir_units);
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mlxsw_reg_qpcr_bytes_set(payload, bytes);
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mlxsw_reg_qpcr_cbs_set(payload, cbs);
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}
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/* QTCT - QoS Switch Traffic Class Table
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* -------------------------------------
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* Configures the mapping between the packet switch priority and the
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@ -5254,6 +5394,7 @@ static const struct mlxsw_reg_info *mlxsw_reg_infos[] = {
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MLXSW_REG(svpe),
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MLXSW_REG(sfmr),
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MLXSW_REG(spvmlr),
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MLXSW_REG(qpcr),
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MLXSW_REG(qtct),
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MLXSW_REG(qeec),
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MLXSW_REG(pmlp),
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