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iommu/mediatek: Rename the register STANDARD_AXI_MODE(0x48) to MISC_CTRL
For iommu offset=0x48 register, only the previous mt8173/mt8183 use the name STANDARD_AXI_MODE, all the latest SoC extend the register more feature by different bits, for example: axi_mode, in_order_en, coherent_en and so on. So rename REG_MMU_MISC_CTRL may be more proper. This patch only rename the register name, no functional change. Signed-off-by: Chao Hao <chao.hao@mediatek.com> Reviewed-by: Yong Wu <yong.wu@mediatek.com> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Link: https://lore.kernel.org/r/20200703044127.27438-3-chao.hao@mediatek.com Signed-off-by: Joerg Roedel <jroedel@suse.de>
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@ -41,7 +41,7 @@
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#define F_INVLD_EN0 BIT(0)
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#define F_INVLD_EN1 BIT(1)
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#define REG_MMU_STANDARD_AXI_MODE 0x048
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#define REG_MMU_MISC_CTRL 0x048
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#define REG_MMU_DCM_DIS 0x050
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#define REG_MMU_CTRL_REG 0x110
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@ -573,8 +573,10 @@ static int mtk_iommu_hw_init(const struct mtk_iommu_data *data)
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}
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writel_relaxed(0, data->base + REG_MMU_DCM_DIS);
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if (data->plat_data->reset_axi)
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writel_relaxed(0, data->base + REG_MMU_STANDARD_AXI_MODE);
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if (data->plat_data->reset_axi) {
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/* The register is called STANDARD_AXI_MODE in this case */
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writel_relaxed(0, data->base + REG_MMU_MISC_CTRL);
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}
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if (devm_request_irq(data->dev, data->irq, mtk_iommu_isr, 0,
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dev_name(data->dev), (void *)data)) {
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@ -718,8 +720,7 @@ static int __maybe_unused mtk_iommu_suspend(struct device *dev)
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struct mtk_iommu_suspend_reg *reg = &data->reg;
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void __iomem *base = data->base;
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reg->standard_axi_mode = readl_relaxed(base +
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REG_MMU_STANDARD_AXI_MODE);
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reg->misc_ctrl = readl_relaxed(base + REG_MMU_MISC_CTRL);
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reg->dcm_dis = readl_relaxed(base + REG_MMU_DCM_DIS);
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reg->ctrl_reg = readl_relaxed(base + REG_MMU_CTRL_REG);
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reg->int_control0 = readl_relaxed(base + REG_MMU_INT_CONTROL0);
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@ -743,8 +744,7 @@ static int __maybe_unused mtk_iommu_resume(struct device *dev)
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dev_err(data->dev, "Failed to enable clk(%d) in resume\n", ret);
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return ret;
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}
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writel_relaxed(reg->standard_axi_mode,
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base + REG_MMU_STANDARD_AXI_MODE);
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writel_relaxed(reg->misc_ctrl, base + REG_MMU_MISC_CTRL);
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writel_relaxed(reg->dcm_dis, base + REG_MMU_DCM_DIS);
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writel_relaxed(reg->ctrl_reg, base + REG_MMU_CTRL_REG);
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writel_relaxed(reg->int_control0, base + REG_MMU_INT_CONTROL0);
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@ -18,7 +18,10 @@
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#include <soc/mediatek/smi.h>
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struct mtk_iommu_suspend_reg {
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u32 standard_axi_mode;
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union {
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u32 standard_axi_mode;/* v1 */
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u32 misc_ctrl;/* v2 */
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};
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u32 dcm_dis;
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u32 ctrl_reg;
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u32 int_control0;
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