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ARM: STi: DT: Add STiH407 family tsout0 pinctrl configuration

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tsout0 channel can be configured for either serial or parallel
data transfer. Both pin configurations are provided.

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
This commit is contained in:
Peter Griffin 2015-06-10 16:04:00 +02:00 committed by Maxime Coquelin
parent dd72896f0d
commit 75d28b8306
1 changed files with 28 additions and 0 deletions
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28
arch/arm/boot/dts/stih407-pinctrl.dtsi
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@ -568,6 +568,34 @@ st,pins {
};
};
};
tsout0 {
pinctrl_tsout0_parallel: tsout0_parallel {
st,pins {
DATA7 = <&pio12 0 ALT3 OUT SE_NICLK_IO 0 CLK_A>;
DATA6 = <&pio12 1 ALT3 OUT SE_NICLK_IO 0 CLK_A>;
DATA5 = <&pio12 2 ALT3 OUT SE_NICLK_IO 0 CLK_A>;
DATA4 = <&pio12 3 ALT3 OUT SE_NICLK_IO 0 CLK_A>;
DATA3 = <&pio12 4 ALT3 OUT SE_NICLK_IO 0 CLK_A>;
DATA2 = <&pio12 5 ALT3 OUT SE_NICLK_IO 0 CLK_A>;
DATA1 = <&pio12 6 ALT3 OUT SE_NICLK_IO 0 CLK_A>;
DATA0 = <&pio12 7 ALT3 OUT SE_NICLK_IO 0 CLK_A>;
CLKIN = <&pio11 7 ALT3 OUT NICLK 0 CLK_A>;
VALID = <&pio11 5 ALT3 OUT SE_NICLK_IO 0 CLK_A>;
ERROR = <&pio11 4 ALT3 OUT SE_NICLK_IO 0 CLK_A>;
PKCLK = <&pio11 6 ALT3 OUT SE_NICLK_IO 0 CLK_A>;
};
};
pinctrl_tsout0_serial: tsout0_serial {
st,pins {
DATA7 = <&pio12 0 ALT3 OUT SE_NICLK_IO 0 CLK_A>;
CLKIN = <&pio11 7 ALT3 OUT NICLK 0 CLK_A>;
VALID = <&pio11 5 ALT3 OUT SE_NICLK_IO 0 CLK_A>;
ERROR = <&pio11 4 ALT3 OUT SE_NICLK_IO 0 CLK_A>;
PKCLK = <&pio11 6 ALT3 OUT SE_NICLK_IO 0 CLK_A>;
};
};
};
};
pin-controller-front1 {