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gpio: dt-bindings: document the concept of GPIO banks
Cc: devicetree@vger.kernel.org Cc: Neil Armstrong <narmstrong@baylibre.com> Cc: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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@ -131,6 +131,19 @@ Every GPIO controller node must contain both an empty "gpio-controller"
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property, and a #gpio-cells integer property, which indicates the number of
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property, and a #gpio-cells integer property, which indicates the number of
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cells in a gpio-specifier.
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cells in a gpio-specifier.
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Some system-on-chips (SoCs) use the concept of GPIO banks. A GPIO bank is an
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instance of a hardware IP core on a silicon die, usually exposed to the
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programmer as a coherent range of I/O addresses. Usually each such bank is
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exposed in the device tree as an individual gpio-controller node, reflecting
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the fact that the hardware was synthesized by reusing the same IP block a
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few times over.
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A GPIO controller may specify a bank ID. This is a hardware index that
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indicate the logical order of the GPIO controller in the hardware architecture,
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usually in the sequence 0, 1, 2 .. n. The hardware index may be different
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from the order of register ranges and related to the backplane of how this
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one bank is connected to the outside through a pin controller for example.
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Optionally, a GPIO controller may have a "ngpios" property. This property
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Optionally, a GPIO controller may have a "ngpios" property. This property
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indicates the number of in-use slots of available slots for GPIOs. The
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indicates the number of in-use slots of available slots for GPIOs. The
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typical example is something like this: the hardware register is 32 bits
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typical example is something like this: the hardware register is 32 bits
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@ -152,6 +165,7 @@ gpio-controller@00000000 {
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reg = <0x00000000 0x1000>;
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reg = <0x00000000 0x1000>;
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gpio-controller;
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gpio-controller;
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#gpio-cells = <2>;
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#gpio-cells = <2>;
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gpio-bank = <0>;
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ngpios = <18>;
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ngpios = <18>;
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}
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}
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