mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-30 23:36:44 +07:00
Qualcomm ARM64 Updates for v4.3
* Add BLSP and required pinctrl info for MSM8916 * Add SDHC aliases and nodes for MSM8916 * Add USB nodes for MSM8916 * Add APQ8016 SBC specific USB configuration * Add APQ8016 LED configuration -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIcBAABAgAGBQJVuR/EAAoJEFKiBbHx2RXVWMMP/ip+Mr9iYWHJxwUjouiASF5W 6BaYP/mKR0SJtFvMomY9hhsk605ByEexOPU9v1HpOUFHVgrjVPvumT9GpKBgQ+rj OguLHL8loAih1fa7LEPgWg1lXf3lpeH3G9w9AXkvbeF9f89YHB9pw+MTEQwftult N4RBVC0Oyy3BakGPDaQ6ynJM2pbjUHqR66QPpreN92fP2aLrdntlgQKrSWmnsEFj j2n7f3zyh1qSaqGOpl/n+ACyhBk9+PVhNHhKVh19QdVxjlZ+b4buISQPOBSqmc9j l59s0rD9eIuKuNqAlD9qKRBm3MdTL+wgmLoh8LhXlKE2vN+2DGLQuKW1U4i/iVGS iwzoMNZiZ6wT4Yr0Q7cS9q0XH2isEmAwWIgiNOAje7GdtU1SoJsecIlIxFhMd6jr z2aZpbV6hhWesoBhqdUwIGvC+WFj7j996Lu3ysCsNEj3inlIAN2PIG1MSR+QRWwo TFttPPySk1LYfTWWKCB0vk5jdqeZZ5o/oIVYUv/c+onGMiV8AHRRIbeLI3HCkASe mTCNkeQJx6ttEUdaq27gImmK46LMw27D6Kzq6yKxqKhb4P0WRDyZ1zpEPL+E0TPk pysqrZKIpaGRXLSR1gbb2yC7dUOvUxZIW6XCjrjlA0Idz7lROzkEwIkI5n0Xr4R3 sdFnaXEwWcySSTR+CTCF =ZeSE -----END PGP SIGNATURE----- Merge tag 'qcom-arm64-for-4.3' of git://codeaurora.org/quic/kernel/agross-msm into next/arm64 Qualcomm ARM64 Updates for v4.3 * Add BLSP and required pinctrl info for MSM8916 * Add SDHC aliases and nodes for MSM8916 * Add USB nodes for MSM8916 * Add APQ8016 SBC specific USB configuration * Add APQ8016 LED configuration * tag 'qcom-arm64-for-4.3' of git://codeaurora.org/quic/kernel/agross-msm: arm64: dts: qcom: Add apq8016-sbc board LED's related device nodes arm64: dts: qcom: Fix apq8016-sbc board USB related pin definitions arm64: dts: qcom: apq8016-sbc: Don't hog client driver pins arm64: dts: qcom: Add msm8916 USB configuration nodes arm64: dts: qcom: Add msm8916 sdhci configuration nodes arm64: dts: qcom: Add msm8916 BLSP device nodes arm64: dts: qcom: Extend msm8916 pinctrl device coverage Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
commit
754d5c784f
@ -2,28 +2,38 @@
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&pm8916_gpios {
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pinctrl-names = "default";
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pinctrl-0 = <&pm8916_gpios_default>;
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pm8916_gpios_default: default {
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usb_hub_reset_pm {
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pins = "gpio1";
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function = PMIC_GPIO_FUNC_NORMAL;
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output-low;
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};
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usb_sw_sel_pm {
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pins = "gpio2";
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function = PMIC_GPIO_FUNC_NORMAL;
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input-disable;
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};
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usr_led_3_ctrl {
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usb_hub_reset_pm: usb_hub_reset_pm {
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pinconf {
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pins = "gpio3";
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function = PMIC_GPIO_FUNC_NORMAL;
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output-low;
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};
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usr_led_4_ctrl {
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};
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usb_sw_sel_pm: usb_sw_sel_pm {
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pinconf {
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pins = "gpio4";
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function = PMIC_GPIO_FUNC_NORMAL;
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power-source = <PM8916_GPIO_VPH>;
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input-disable;
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};
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};
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pm8916_gpios_leds: pm8916_gpios_leds {
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pinconf {
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pins = "gpio1", "gpio2";
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function = PMIC_GPIO_FUNC_NORMAL;
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output-low;
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};
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};
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};
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&pm8916_mpps {
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pm8916_mpps_leds: pm8916_mpps_leds {
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pinconf {
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pins = "mpp2", "mpp3";
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function = PMIC_GPIO_FUNC_NORMAL;
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output-low;
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};
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};
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|
@ -3,17 +3,9 @@
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&msmgpio {
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pinctrl-names = "default";
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pinctrl-0 = <&soc_gpios_default>;
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soc_gpios_default: default {
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usr_led_1_ctrl_default: usr_led_1_ctrl_default {
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pins = "gpio21";
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function = "gpio";
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output-low;
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};
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usr_led_2_ctrl_default: usr_led_2_ctrl_default {
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pins = "gpio120";
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msmgpio_leds: msmgpio_leds {
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pinconf {
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pins = "gpio21", "gpio120";
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function = "gpio";
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output-low;
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};
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|
@ -32,5 +32,56 @@ serial@78b0000 {
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pinctrl-0 = <&blsp1_uart2_default>;
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pinctrl-1 = <&blsp1_uart2_sleep>;
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};
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leds {
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pinctrl-names = "default";
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pinctrl-0 = <&msmgpio_leds>,
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<&pm8916_gpios_leds>,
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<&pm8916_mpps_leds>;
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compatible = "gpio-leds";
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led@1 {
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label = "apq8016-sbc:green:user1";
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gpios = <&msmgpio 21 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "heartbeat";
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default-state = "off";
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};
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led@2 {
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label = "apq8016-sbc:green:user2";
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gpios = <&msmgpio 120 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "mmc0";
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default-state = "off";
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};
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led@3 {
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label = "apq8016-sbc:green:user3";
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gpios = <&pm8916_gpios 1 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "mmc1";
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default-state = "off";
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};
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led@4 {
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label = "apq8016-sbc:green:user4";
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gpios = <&pm8916_gpios 2 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "none";
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default-state = "off";
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};
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led@5 {
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label = "apq8016-sbc:yellow:wlan";
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gpios = <&pm8916_mpps 2 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "wlan";
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default-state = "off";
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};
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led@6 {
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label = "apq8016-sbc:blue:bt";
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gpios = <&pm8916_mpps 3 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "bt";
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default-state = "off";
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};
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};
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};
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};
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|
430
arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
Normal file
430
arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
Normal file
@ -0,0 +1,430 @@
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/*
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* Copyright (c) 2013-2015, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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&msmgpio {
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blsp1_uart2_default: blsp1_uart2_default {
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pinmux {
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function = "blsp_uart2";
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pins = "gpio4", "gpio5";
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};
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pinconf {
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pins = "gpio4", "gpio5";
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drive-strength = <16>;
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bias-disable;
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};
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};
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blsp1_uart2_sleep: blsp1_uart2_sleep {
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pinmux {
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function = "blsp_uart2";
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pins = "gpio4", "gpio5";
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};
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pinconf {
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pins = "gpio4", "gpio5";
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drive-strength = <2>;
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bias-pull-down;
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};
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};
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spi1_default: spi1_default {
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pinmux {
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function = "blsp_spi1";
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pins = "gpio0", "gpio1", "gpio3";
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};
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pinmux_cs {
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function = "gpio";
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pins = "gpio2";
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};
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pinconf {
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pins = "gpio0", "gpio1", "gpio3";
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drive-strength = <12>;
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bias-disable;
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};
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pinconf_cs {
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pins = "gpio2";
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drive-strength = <2>;
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bias-disable;
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output-high;
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};
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};
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spi1_sleep: spi1_sleep {
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pinmux {
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function = "gpio";
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pins = "gpio0", "gpio1", "gpio2", "gpio3";
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};
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pinconf {
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pins = "gpio0", "gpio1", "gpio2", "gpio3";
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drive-strength = <2>;
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bias-pull-down;
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};
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};
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spi2_default: spi2_default {
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pinmux {
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function = "blsp_spi2";
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pins = "gpio4", "gpio5", "gpio7";
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};
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pinmux_cs {
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function = "gpio";
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pins = "gpio6";
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};
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pinconf {
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pins = "gpio4", "gpio5", "gpio6", "gpio7";
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drive-strength = <12>;
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bias-disable;
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};
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pinconf_cs {
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pins = "gpio6";
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drive-strength = <2>;
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bias-disable;
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output-high;
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};
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};
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spi2_sleep: spi2_sleep {
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pinmux {
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function = "gpio";
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pins = "gpio4", "gpio5", "gpio6", "gpio7";
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};
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pinconf {
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pins = "gpio4", "gpio5", "gpio6", "gpio7";
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drive-strength = <2>;
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bias-pull-down;
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};
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};
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spi3_default: spi3_default {
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pinmux {
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function = "blsp_spi3";
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pins = "gpio8", "gpio9", "gpio11";
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};
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pinmux_cs {
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function = "gpio";
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pins = "gpio10";
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};
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pinconf {
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pins = "gpio8", "gpio9", "gpio10", "gpio11";
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drive-strength = <12>;
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bias-disable;
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};
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pinconf_cs {
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pins = "gpio10";
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drive-strength = <2>;
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bias-disable;
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output-high;
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};
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};
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spi3_sleep: spi3_sleep {
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pinmux {
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function = "gpio";
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pins = "gpio8", "gpio9", "gpio10", "gpio11";
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};
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pinconf {
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pins = "gpio8", "gpio9", "gpio10", "gpio11";
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drive-strength = <2>;
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bias-pull-down;
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};
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};
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spi4_default: spi4_default {
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pinmux {
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function = "blsp_spi4";
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pins = "gpio12", "gpio13", "gpio15";
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};
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pinmux_cs {
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function = "gpio";
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pins = "gpio14";
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};
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pinconf {
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pins = "gpio12", "gpio13", "gpio14", "gpio15";
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drive-strength = <12>;
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bias-disable;
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};
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pinconf_cs {
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pins = "gpio14";
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drive-strength = <2>;
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bias-disable;
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output-high;
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};
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};
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spi4_sleep: spi4_sleep {
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pinmux {
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function = "gpio";
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pins = "gpio12", "gpio13", "gpio14", "gpio15";
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};
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pinconf {
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pins = "gpio12", "gpio13", "gpio14", "gpio15";
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drive-strength = <2>;
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bias-pull-down;
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};
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};
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spi5_default: spi5_default {
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pinmux {
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function = "blsp_spi5";
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pins = "gpio16", "gpio17", "gpio19";
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};
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pinmux_cs {
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function = "gpio";
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pins = "gpio18";
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};
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pinconf {
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pins = "gpio16", "gpio17", "gpio18", "gpio19";
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drive-strength = <12>;
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bias-disable;
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};
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pinconf_cs {
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pins = "gpio18";
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drive-strength = <2>;
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bias-disable;
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output-high;
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};
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};
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spi5_sleep: spi5_sleep {
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||||
pinmux {
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function = "gpio";
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pins = "gpio16", "gpio17", "gpio18", "gpio19";
|
||||
};
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pinconf {
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pins = "gpio16", "gpio17", "gpio18", "gpio19";
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drive-strength = <2>;
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||||
bias-pull-down;
|
||||
};
|
||||
};
|
||||
|
||||
spi6_default: spi6_default {
|
||||
pinmux {
|
||||
function = "blsp_spi6";
|
||||
pins = "gpio20", "gpio21", "gpio23";
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||||
};
|
||||
pinmux_cs {
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function = "gpio";
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pins = "gpio22";
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||||
};
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||||
pinconf {
|
||||
pins = "gpio20", "gpio21", "gpio22", "gpio23";
|
||||
drive-strength = <12>;
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||||
bias-disable;
|
||||
};
|
||||
pinconf_cs {
|
||||
pins = "gpio22";
|
||||
drive-strength = <2>;
|
||||
bias-disable;
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output-high;
|
||||
};
|
||||
};
|
||||
|
||||
spi6_sleep: spi6_sleep {
|
||||
pinmux {
|
||||
function = "gpio";
|
||||
pins = "gpio20", "gpio21", "gpio22", "gpio23";
|
||||
};
|
||||
pinconf {
|
||||
pins = "gpio20", "gpio21", "gpio22", "gpio23";
|
||||
drive-strength = <2>;
|
||||
bias-pull-down;
|
||||
};
|
||||
};
|
||||
|
||||
i2c4_default: i2c4_default {
|
||||
pinmux {
|
||||
function = "blsp_i2c4";
|
||||
pins = "gpio14", "gpio15";
|
||||
};
|
||||
pinconf {
|
||||
pins = "gpio14", "gpio15";
|
||||
drive-strength = <2>;
|
||||
bias-disable = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
i2c4_sleep: i2c4_sleep {
|
||||
pinmux {
|
||||
function = "blsp_i2c4";
|
||||
pins = "gpio14", "gpio15";
|
||||
};
|
||||
pinconf {
|
||||
pins = "gpio14", "gpio15";
|
||||
drive-strength = <2>;
|
||||
bias-disable = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
sdhc2_cd_pin {
|
||||
sdc2_cd_on: cd_on {
|
||||
pinmux {
|
||||
function = "gpio";
|
||||
pins = "gpio38";
|
||||
};
|
||||
pinconf {
|
||||
pins = "gpio38";
|
||||
drive-strength = <2>;
|
||||
bias-pull-up;
|
||||
};
|
||||
};
|
||||
sdc2_cd_off: cd_off {
|
||||
pinmux {
|
||||
function = "gpio";
|
||||
pins = "gpio38";
|
||||
};
|
||||
pinconf {
|
||||
pins = "gpio38";
|
||||
drive-strength = <2>;
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
pmx_sdc1_clk {
|
||||
sdc1_clk_on: clk_on {
|
||||
pinmux {
|
||||
pins = "sdc1_clk";
|
||||
};
|
||||
pinconf {
|
||||
pins = "sdc1_clk";
|
||||
bias-disable;
|
||||
drive-strength = <16>;
|
||||
};
|
||||
};
|
||||
sdc1_clk_off: clk_off {
|
||||
pinmux {
|
||||
pins = "sdc1_clk";
|
||||
};
|
||||
pinconf {
|
||||
pins = "sdc1_clk";
|
||||
bias-disable;
|
||||
drive-strength = <2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
pmx_sdc1_cmd {
|
||||
sdc1_cmd_on: cmd_on {
|
||||
pinmux {
|
||||
pins = "sdc1_cmd";
|
||||
};
|
||||
pinconf {
|
||||
pins = "sdc1_cmd";
|
||||
bias-pull-up;
|
||||
drive-strength = <10>;
|
||||
};
|
||||
};
|
||||
sdc1_cmd_off: cmd_off {
|
||||
pinmux {
|
||||
pins = "sdc1_cmd";
|
||||
};
|
||||
pinconf {
|
||||
pins = "sdc1_cmd";
|
||||
bias-pull-up;
|
||||
drive-strength = <2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
pmx_sdc1_data {
|
||||
sdc1_data_on: data_on {
|
||||
pinmux {
|
||||
pins = "sdc1_data";
|
||||
};
|
||||
pinconf {
|
||||
pins = "sdc1_data";
|
||||
bias-pull-up;
|
||||
drive-strength = <10>;
|
||||
};
|
||||
};
|
||||
sdc1_data_off: data_off {
|
||||
pinmux {
|
||||
pins = "sdc1_data";
|
||||
};
|
||||
pinconf {
|
||||
pins = "sdc1_data";
|
||||
bias-pull-up;
|
||||
drive-strength = <2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
pmx_sdc2_clk {
|
||||
sdc2_clk_on: clk_on {
|
||||
pinmux {
|
||||
pins = "sdc2_clk";
|
||||
};
|
||||
pinconf {
|
||||
pins = "sdc2_clk";
|
||||
bias-disable;
|
||||
drive-strength = <16>;
|
||||
};
|
||||
};
|
||||
sdc2_clk_off: clk_off {
|
||||
pinmux {
|
||||
pins = "sdc2_clk";
|
||||
};
|
||||
pinconf {
|
||||
pins = "sdc2_clk";
|
||||
bias-disable;
|
||||
drive-strength = <2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
pmx_sdc2_cmd {
|
||||
sdc2_cmd_on: cmd_on {
|
||||
pinmux {
|
||||
pins = "sdc2_cmd";
|
||||
};
|
||||
pinconf {
|
||||
pins = "sdc2_cmd";
|
||||
bias-pull-up;
|
||||
drive-strength = <10>;
|
||||
};
|
||||
};
|
||||
sdc2_cmd_off: cmd_off {
|
||||
pinmux {
|
||||
pins = "sdc2_cmd";
|
||||
};
|
||||
pinconf {
|
||||
pins = "sdc2_cmd";
|
||||
bias-pull-up;
|
||||
drive-strength = <2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
pmx_sdc2_data {
|
||||
sdc2_data_on: data_on {
|
||||
pinmux {
|
||||
pins = "sdc2_data";
|
||||
};
|
||||
pinconf {
|
||||
pins = "sdc2_data";
|
||||
bias-pull-up;
|
||||
drive-strength = <10>;
|
||||
};
|
||||
};
|
||||
sdc2_data_off: data_off {
|
||||
pinmux {
|
||||
pins = "sdc2_data";
|
||||
};
|
||||
pinconf {
|
||||
pins = "sdc2_data";
|
||||
bias-pull-up;
|
||||
drive-strength = <2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
@ -24,7 +24,10 @@ / {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
|
||||
aliases { };
|
||||
aliases {
|
||||
sdhc1 = &sdhc_1; /* SDC1 eMMC slot */
|
||||
sdhc2 = &sdhc_2; /* SDC2 SD card slot */
|
||||
};
|
||||
|
||||
chosen { };
|
||||
|
||||
@ -90,30 +93,6 @@ msmgpio: pinctrl@1000000 {
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
|
||||
blsp1_uart2_default: blsp1_uart2_default {
|
||||
pinmux {
|
||||
function = "blsp_uart2";
|
||||
pins = "gpio4", "gpio5";
|
||||
};
|
||||
pinconf {
|
||||
pins = "gpio4", "gpio5";
|
||||
drive-strength = <16>;
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
|
||||
blsp1_uart2_sleep: blsp1_uart2_sleep {
|
||||
pinmux {
|
||||
function = "blsp_uart2";
|
||||
pins = "gpio4", "gpio5";
|
||||
};
|
||||
pinconf {
|
||||
pins = "gpio4", "gpio5";
|
||||
drive-strength = <2>;
|
||||
bias-pull-down;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
gcc: qcom,gcc@1800000 {
|
||||
@ -132,6 +111,202 @@ blsp1_uart2: serial@78b0000 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
blsp_dma: dma@7884000 {
|
||||
compatible = "qcom,bam-v1.7.0";
|
||||
reg = <0x07884000 0x23000>;
|
||||
interrupts = <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&gcc GCC_BLSP1_AHB_CLK>;
|
||||
clock-names = "bam_clk";
|
||||
#dma-cells = <1>;
|
||||
qcom,ee = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
blsp_spi1: spi@78b5000 {
|
||||
compatible = "qcom,spi-qup-v2.2.1";
|
||||
reg = <0x078b5000 0x600>;
|
||||
interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&gcc GCC_BLSP1_QUP1_SPI_APPS_CLK>,
|
||||
<&gcc GCC_BLSP1_AHB_CLK>;
|
||||
clock-names = "core", "iface";
|
||||
dmas = <&blsp_dma 5>, <&blsp_dma 4>;
|
||||
dma-names = "rx", "tx";
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&spi1_default>;
|
||||
pinctrl-1 = <&spi1_sleep>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
blsp_spi2: spi@78b6000 {
|
||||
compatible = "qcom,spi-qup-v2.2.1";
|
||||
reg = <0x078b6000 0x600>;
|
||||
interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&gcc GCC_BLSP1_QUP2_SPI_APPS_CLK>,
|
||||
<&gcc GCC_BLSP1_AHB_CLK>;
|
||||
clock-names = "core", "iface";
|
||||
dmas = <&blsp_dma 7>, <&blsp_dma 6>;
|
||||
dma-names = "rx", "tx";
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&spi2_default>;
|
||||
pinctrl-1 = <&spi2_sleep>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
blsp_spi3: spi@78b7000 {
|
||||
compatible = "qcom,spi-qup-v2.2.1";
|
||||
reg = <0x078b7000 0x600>;
|
||||
interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&gcc GCC_BLSP1_QUP3_SPI_APPS_CLK>,
|
||||
<&gcc GCC_BLSP1_AHB_CLK>;
|
||||
clock-names = "core", "iface";
|
||||
dmas = <&blsp_dma 9>, <&blsp_dma 8>;
|
||||
dma-names = "rx", "tx";
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&spi3_default>;
|
||||
pinctrl-1 = <&spi3_sleep>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
blsp_spi4: spi@78b8000 {
|
||||
compatible = "qcom,spi-qup-v2.2.1";
|
||||
reg = <0x078b8000 0x600>;
|
||||
interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&gcc GCC_BLSP1_QUP4_SPI_APPS_CLK>,
|
||||
<&gcc GCC_BLSP1_AHB_CLK>;
|
||||
clock-names = "core", "iface";
|
||||
dmas = <&blsp_dma 11>, <&blsp_dma 10>;
|
||||
dma-names = "rx", "tx";
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&spi4_default>;
|
||||
pinctrl-1 = <&spi4_sleep>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
blsp_spi5: spi@78b9000 {
|
||||
compatible = "qcom,spi-qup-v2.2.1";
|
||||
reg = <0x078b9000 0x600>;
|
||||
interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&gcc GCC_BLSP1_QUP5_SPI_APPS_CLK>,
|
||||
<&gcc GCC_BLSP1_AHB_CLK>;
|
||||
clock-names = "core", "iface";
|
||||
dmas = <&blsp_dma 13>, <&blsp_dma 12>;
|
||||
dma-names = "rx", "tx";
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&spi5_default>;
|
||||
pinctrl-1 = <&spi5_sleep>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
blsp_spi6: spi@78ba000 {
|
||||
compatible = "qcom,spi-qup-v2.2.1";
|
||||
reg = <0x078ba000 0x600>;
|
||||
interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&gcc GCC_BLSP1_QUP6_SPI_APPS_CLK>,
|
||||
<&gcc GCC_BLSP1_AHB_CLK>;
|
||||
clock-names = "core", "iface";
|
||||
dmas = <&blsp_dma 15>, <&blsp_dma 14>;
|
||||
dma-names = "rx", "tx";
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&spi6_default>;
|
||||
pinctrl-1 = <&spi6_sleep>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
blsp_i2c4: i2c@78b8000 {
|
||||
compatible = "qcom,i2c-qup-v2.2.1";
|
||||
reg = <0x78b8000 0x1000>;
|
||||
interrupts = <GIC_SPI 98 0>;
|
||||
clocks = <&gcc GCC_BLSP1_AHB_CLK>,
|
||||
<&gcc GCC_BLSP1_QUP4_I2C_APPS_CLK>;
|
||||
clock-names = "iface", "core";
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&i2c4_default>;
|
||||
pinctrl-1 = <&i2c4_sleep>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
sdhc_1: sdhci@07824000 {
|
||||
compatible = "qcom,sdhci-msm-v4";
|
||||
reg = <0x07824900 0x11c>, <0x07824000 0x800>;
|
||||
reg-names = "hc_mem", "core_mem";
|
||||
|
||||
interrupts = <0 123 0>, <0 138 0>;
|
||||
interrupt-names = "hc_irq", "pwr_irq";
|
||||
clocks = <&gcc GCC_SDCC1_APPS_CLK>,
|
||||
<&gcc GCC_SDCC1_AHB_CLK>;
|
||||
clock-names = "core", "iface";
|
||||
bus-width = <8>;
|
||||
non-removable;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
sdhc_2: sdhci@07864000 {
|
||||
compatible = "qcom,sdhci-msm-v4";
|
||||
reg = <0x07864900 0x11c>, <0x07864000 0x800>;
|
||||
reg-names = "hc_mem", "core_mem";
|
||||
|
||||
interrupts = <0 125 0>, <0 221 0>;
|
||||
interrupt-names = "hc_irq", "pwr_irq";
|
||||
clocks = <&gcc GCC_SDCC2_APPS_CLK>,
|
||||
<&gcc GCC_SDCC2_AHB_CLK>;
|
||||
clock-names = "core", "iface";
|
||||
bus-width = <4>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usb_dev: usb@78d9000 {
|
||||
compatible = "qcom,ci-hdrc";
|
||||
reg = <0x78d9000 0x400>;
|
||||
dr_mode = "peripheral";
|
||||
interrupts = <GIC_SPI 134 IRQ_TYPE_NONE>;
|
||||
usb-phy = <&usb_otg>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usb_host: ehci@78d9000 {
|
||||
compatible = "qcom,ehci-host";
|
||||
reg = <0x78d9000 0x400>;
|
||||
interrupts = <GIC_SPI 134 IRQ_TYPE_NONE>;
|
||||
usb-phy = <&usb_otg>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usb_otg: phy@78d9000 {
|
||||
compatible = "qcom,usb-otg-snps";
|
||||
reg = <0x78d9000 0x400>;
|
||||
interrupts = <GIC_SPI 134 IRQ_TYPE_EDGE_BOTH>,
|
||||
<GIC_SPI 140 IRQ_TYPE_EDGE_RISING>;
|
||||
|
||||
qcom,vdd-levels = <1 5 7>;
|
||||
qcom,phy-init-sequence = <0x44 0x6B 0x24 0x13>;
|
||||
dr_mode = "peripheral";
|
||||
qcom,otg-control = <2>; // PMIC
|
||||
|
||||
clocks = <&gcc GCC_USB_HS_AHB_CLK>,
|
||||
<&gcc GCC_USB_HS_SYSTEM_CLK>,
|
||||
<&gcc GCC_USB2A_PHY_SLEEP_CLK>;
|
||||
clock-names = "iface", "core", "sleep";
|
||||
|
||||
resets = <&gcc GCC_USB2A_PHY_BCR>,
|
||||
<&gcc GCC_USB_HS_BCR>;
|
||||
reset-names = "phy", "link";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
intc: interrupt-controller@b000000 {
|
||||
compatible = "qcom,msm-qgic2";
|
||||
interrupt-controller;
|
||||
@ -217,3 +392,5 @@ spmi_bus: spmi@200f000 {
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
#include "msm8916-pins.dtsi"
|
||||
|
Loading…
Reference in New Issue
Block a user