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PCI: armada: Remove redundant struct armada8k_pcie.base
The struct armada8k_pcie.base pointer is always a constant offset from struct pcie_port.dbi_base. Encode that offset in the register macros so we don't need to maintain the armada8k_pcie.base pointer. No functional change intended. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
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@ -29,34 +29,33 @@
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#include "pcie-designware.h"
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struct armada8k_pcie {
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void __iomem *base;
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struct clk *clk;
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struct pcie_port pp;
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};
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#define PCIE_VENDOR_REGS_OFFSET 0x8000
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#define PCIE_GLOBAL_CONTROL_REG 0x0
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#define PCIE_GLOBAL_CONTROL_REG (PCIE_VENDOR_REGS_OFFSET + 0x0)
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#define PCIE_APP_LTSSM_EN BIT(2)
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#define PCIE_DEVICE_TYPE_SHIFT 4
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#define PCIE_DEVICE_TYPE_MASK 0xF
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#define PCIE_DEVICE_TYPE_RC 0x4 /* Root complex */
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#define PCIE_GLOBAL_STATUS_REG 0x8
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#define PCIE_GLOBAL_STATUS_REG (PCIE_VENDOR_REGS_OFFSET + 0x8)
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#define PCIE_GLB_STS_RDLH_LINK_UP BIT(1)
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#define PCIE_GLB_STS_PHY_LINK_UP BIT(9)
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#define PCIE_GLOBAL_INT_CAUSE1_REG 0x1C
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#define PCIE_GLOBAL_INT_MASK1_REG 0x20
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#define PCIE_GLOBAL_INT_CAUSE1_REG (PCIE_VENDOR_REGS_OFFSET + 0x1C)
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#define PCIE_GLOBAL_INT_MASK1_REG (PCIE_VENDOR_REGS_OFFSET + 0x20)
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#define PCIE_INT_A_ASSERT_MASK BIT(9)
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#define PCIE_INT_B_ASSERT_MASK BIT(10)
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#define PCIE_INT_C_ASSERT_MASK BIT(11)
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#define PCIE_INT_D_ASSERT_MASK BIT(12)
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#define PCIE_ARCACHE_TRC_REG 0x50
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#define PCIE_AWCACHE_TRC_REG 0x54
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#define PCIE_ARUSER_REG 0x5C
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#define PCIE_AWUSER_REG 0x60
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#define PCIE_ARCACHE_TRC_REG (PCIE_VENDOR_REGS_OFFSET + 0x50)
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#define PCIE_AWCACHE_TRC_REG (PCIE_VENDOR_REGS_OFFSET + 0x54)
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#define PCIE_ARUSER_REG (PCIE_VENDOR_REGS_OFFSET + 0x5C)
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#define PCIE_AWUSER_REG (PCIE_VENDOR_REGS_OFFSET + 0x60)
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/*
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* AR/AW Cache defauls: Normal memory, Write-Back, Read / Write
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* allocate
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@ -73,7 +72,7 @@ struct armada8k_pcie {
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static int armada8k_pcie_link_up(struct pcie_port *pp)
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{
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struct armada8k_pcie *pcie = to_armada8k_pcie(pp);
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void __iomem *base = pcie->base;
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void __iomem *base = pcie->pp.dbi_base;
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u32 reg;
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u32 mask = PCIE_GLB_STS_RDLH_LINK_UP | PCIE_GLB_STS_PHY_LINK_UP;
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@ -89,7 +88,7 @@ static int armada8k_pcie_link_up(struct pcie_port *pp)
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static void armada8k_pcie_establish_link(struct pcie_port *pp)
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{
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struct armada8k_pcie *pcie = to_armada8k_pcie(pp);
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void __iomem *base = pcie->base;
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void __iomem *base = pcie->pp.dbi_base;
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u32 reg;
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if (!dw_pcie_link_up(pp)) {
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@ -148,7 +147,7 @@ static irqreturn_t armada8k_pcie_irq_handler(int irq, void *arg)
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{
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struct pcie_port *pp = arg;
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struct armada8k_pcie *pcie = to_armada8k_pcie(pp);
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void __iomem *base = pcie->base;
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void __iomem *base = pcie->pp.dbi_base;
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u32 val;
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/*
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@ -228,8 +227,6 @@ static int armada8k_pcie_probe(struct platform_device *pdev)
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goto fail;
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}
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pcie->base = pp->dbi_base + PCIE_VENDOR_REGS_OFFSET;
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ret = armada8k_add_pcie_port(pp, pdev);
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if (ret)
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goto fail;
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