mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-19 13:57:27 +07:00
staging: typec: Type-C Port Controller Interface driver (tcpci)
The port controller interface driver interconnects the Type-C Port Manager with a Type-C Port Controller Interface (TCPCI) compliant port controller. Signed-off-by: Guenter Roeck <groeck@chromium.org> Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Guenter Roeck
Greg Kroah-Hartman
parent
f0690a25a1
commit
74e656d6b0
@ -8,4 +8,15 @@ config TYPEC_TCPM
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The Type-C Port Controller Manager provides a USB PD and USB Type-C
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state machine for use with Type-C Port Controllers.
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if TYPEC_TCPM
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config TYPEC_TCPCI
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tristate "Type-C Port Controller Interface driver"
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depends on I2C
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select REGMAP_I2C
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help
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Type-C Port Controller driver for TCPCI-compliant controller.
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endif
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endmenu
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@ -1 +1,2 @@
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obj-$(CONFIG_TYPEC_TCPM) += tcpm.o
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obj-$(CONFIG_TYPEC_TCPCI) += tcpci.o
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@ -8,5 +8,8 @@ tcpm:
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- Add support for USB PD 3.0. While not mandatory, at least fast role swap
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as well as authentication support would be very desirable.
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tcpci:
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- Test with real hardware
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Please send patches to Guenter Roeck <linux@roeck-us.net> and copy
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Heikki Krogerus <heikki.krogerus@linux.intel.com>.
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526
drivers/staging/typec/tcpci.c
Normal file
526
drivers/staging/typec/tcpci.c
Normal file
@ -0,0 +1,526 @@
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/*
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* Copyright 2015-2017 Google, Inc
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* USB Type-C Port Controller Interface.
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*/
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#include <linux/delay.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/i2c.h>
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#include <linux/interrupt.h>
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#include <linux/regmap.h>
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#include <linux/usb/typec.h>
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#include "pd.h"
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#include "tcpci.h"
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#include "tcpm.h"
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#define PD_RETRY_COUNT 3
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struct tcpci {
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struct device *dev;
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struct i2c_client *client;
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struct tcpm_port *port;
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struct regmap *regmap;
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bool controls_vbus;
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struct tcpc_dev tcpc;
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};
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static inline struct tcpci *tcpc_to_tcpci(struct tcpc_dev *tcpc)
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{
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return container_of(tcpc, struct tcpci, tcpc);
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}
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static int tcpci_read16(struct tcpci *tcpci, unsigned int reg,
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unsigned int *val)
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{
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return regmap_raw_read(tcpci->regmap, reg, val, sizeof(u16));
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}
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static int tcpci_write16(struct tcpci *tcpci, unsigned int reg, u16 val)
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{
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return regmap_raw_write(tcpci->regmap, reg, &val, sizeof(u16));
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}
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static int tcpci_set_cc(struct tcpc_dev *tcpc, enum typec_cc_status cc)
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{
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struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
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unsigned int reg;
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int ret;
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switch (cc) {
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case TYPEC_CC_RA:
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reg = (TCPC_ROLE_CTRL_CC_RA << TCPC_ROLE_CTRL_CC1_SHIFT) |
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(TCPC_ROLE_CTRL_CC_RA << TCPC_ROLE_CTRL_CC2_SHIFT);
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break;
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case TYPEC_CC_RD:
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reg = (TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_CC1_SHIFT) |
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(TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_CC2_SHIFT);
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break;
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case TYPEC_CC_RP_DEF:
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reg = (TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC1_SHIFT) |
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(TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC2_SHIFT) |
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(TCPC_ROLE_CTRL_RP_VAL_DEF <<
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TCPC_ROLE_CTRL_RP_VAL_SHIFT);
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break;
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case TYPEC_CC_RP_1_5:
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reg = (TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC1_SHIFT) |
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(TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC2_SHIFT) |
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(TCPC_ROLE_CTRL_RP_VAL_1_5 <<
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TCPC_ROLE_CTRL_RP_VAL_SHIFT);
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break;
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case TYPEC_CC_RP_3_0:
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reg = (TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC1_SHIFT) |
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(TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC2_SHIFT) |
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(TCPC_ROLE_CTRL_RP_VAL_3_0 <<
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TCPC_ROLE_CTRL_RP_VAL_SHIFT);
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break;
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case TYPEC_CC_OPEN:
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default:
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reg = (TCPC_ROLE_CTRL_CC_OPEN << TCPC_ROLE_CTRL_CC1_SHIFT) |
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(TCPC_ROLE_CTRL_CC_OPEN << TCPC_ROLE_CTRL_CC2_SHIFT);
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break;
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}
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ret = regmap_write(tcpci->regmap, TCPC_ROLE_CTRL, reg);
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if (ret < 0)
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return ret;
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return 0;
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}
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static int tcpci_start_drp_toggling(struct tcpc_dev *tcpc,
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enum typec_cc_status cc)
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{
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struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
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unsigned int reg = TCPC_ROLE_CTRL_DRP;
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switch (cc) {
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default:
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case TYPEC_CC_RP_DEF:
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reg |= (TCPC_ROLE_CTRL_RP_VAL_DEF <<
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TCPC_ROLE_CTRL_RP_VAL_SHIFT);
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break;
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case TYPEC_CC_RP_1_5:
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reg |= (TCPC_ROLE_CTRL_RP_VAL_1_5 <<
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TCPC_ROLE_CTRL_RP_VAL_SHIFT);
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break;
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case TYPEC_CC_RP_3_0:
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reg |= (TCPC_ROLE_CTRL_RP_VAL_3_0 <<
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TCPC_ROLE_CTRL_RP_VAL_SHIFT);
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break;
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}
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return regmap_write(tcpci->regmap, TCPC_ROLE_CTRL, reg);
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}
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static enum typec_cc_status tcpci_to_typec_cc(unsigned int cc, bool sink)
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{
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switch (cc) {
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case 0x1:
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return sink ? TYPEC_CC_RP_DEF : TYPEC_CC_RA;
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case 0x2:
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return sink ? TYPEC_CC_RP_1_5 : TYPEC_CC_RD;
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case 0x3:
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if (sink)
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return TYPEC_CC_RP_3_0;
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case 0x0:
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default:
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return TYPEC_CC_OPEN;
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}
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}
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static int tcpci_get_cc(struct tcpc_dev *tcpc,
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enum typec_cc_status *cc1, enum typec_cc_status *cc2)
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{
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struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
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unsigned int reg;
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int ret;
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ret = regmap_read(tcpci->regmap, TCPC_CC_STATUS, ®);
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if (ret < 0)
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return ret;
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*cc1 = tcpci_to_typec_cc((reg >> TCPC_CC_STATUS_CC1_SHIFT) &
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TCPC_CC_STATUS_CC1_MASK,
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reg & TCPC_CC_STATUS_TERM);
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*cc2 = tcpci_to_typec_cc((reg >> TCPC_CC_STATUS_CC2_SHIFT) &
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TCPC_CC_STATUS_CC2_MASK,
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reg & TCPC_CC_STATUS_TERM);
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return 0;
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}
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static int tcpci_set_polarity(struct tcpc_dev *tcpc,
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enum typec_cc_polarity polarity)
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{
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struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
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int ret;
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ret = regmap_write(tcpci->regmap, TCPC_TCPC_CTRL,
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(polarity == TYPEC_POLARITY_CC2) ?
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TCPC_TCPC_CTRL_ORIENTATION : 0);
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if (ret < 0)
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return ret;
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return 0;
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}
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static int tcpci_set_vconn(struct tcpc_dev *tcpc, bool enable)
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{
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struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
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int ret;
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ret = regmap_write(tcpci->regmap, TCPC_POWER_CTRL,
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enable ? TCPC_POWER_CTRL_VCONN_ENABLE : 0);
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if (ret < 0)
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return ret;
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return 0;
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}
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static int tcpci_set_roles(struct tcpc_dev *tcpc, bool attached,
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enum typec_role role, enum typec_data_role data)
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{
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struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
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unsigned int reg;
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int ret;
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reg = PD_REV20 << TCPC_MSG_HDR_INFO_REV_SHIFT;
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if (role == TYPEC_SOURCE)
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reg |= TCPC_MSG_HDR_INFO_PWR_ROLE;
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if (data == TYPEC_HOST)
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reg |= TCPC_MSG_HDR_INFO_DATA_ROLE;
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ret = regmap_write(tcpci->regmap, TCPC_MSG_HDR_INFO, reg);
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if (ret < 0)
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return ret;
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return 0;
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}
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static int tcpci_set_pd_rx(struct tcpc_dev *tcpc, bool enable)
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{
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struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
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unsigned int reg = 0;
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int ret;
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if (enable)
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reg = TCPC_RX_DETECT_SOP | TCPC_RX_DETECT_HARD_RESET;
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ret = regmap_write(tcpci->regmap, TCPC_RX_DETECT, reg);
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if (ret < 0)
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return ret;
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return 0;
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}
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static int tcpci_get_vbus(struct tcpc_dev *tcpc)
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{
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struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
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unsigned int reg;
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int ret;
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ret = regmap_read(tcpci->regmap, TCPC_POWER_STATUS, ®);
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if (ret < 0)
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return ret;
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return !!(reg & TCPC_POWER_STATUS_VBUS_PRES);
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}
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static int tcpci_set_vbus(struct tcpc_dev *tcpc, bool source, bool sink)
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{
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struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
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int ret;
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/* Disable both source and sink first before enabling anything */
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if (!source) {
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ret = regmap_write(tcpci->regmap, TCPC_COMMAND,
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TCPC_CMD_DISABLE_SRC_VBUS);
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if (ret < 0)
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return ret;
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}
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if (!sink) {
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ret = regmap_write(tcpci->regmap, TCPC_COMMAND,
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TCPC_CMD_DISABLE_SINK_VBUS);
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if (ret < 0)
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return ret;
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}
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if (source) {
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ret = regmap_write(tcpci->regmap, TCPC_COMMAND,
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TCPC_CMD_SRC_VBUS_DEFAULT);
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if (ret < 0)
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return ret;
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}
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if (sink) {
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ret = regmap_write(tcpci->regmap, TCPC_COMMAND,
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TCPC_CMD_SINK_VBUS);
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if (ret < 0)
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return ret;
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}
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return 0;
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}
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static int tcpci_pd_transmit(struct tcpc_dev *tcpc,
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enum tcpm_transmit_type type,
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const struct pd_message *msg)
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{
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struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
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unsigned int reg, cnt, header;
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int ret;
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cnt = msg ? pd_header_cnt(msg->header) * 4 : 0;
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ret = regmap_write(tcpci->regmap, TCPC_TX_BYTE_CNT, cnt + 2);
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if (ret < 0)
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return ret;
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header = msg ? msg->header : 0;
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ret = tcpci_write16(tcpci, TCPC_TX_HDR, header);
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if (ret < 0)
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return ret;
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if (cnt > 0) {
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ret = regmap_raw_write(tcpci->regmap, TCPC_TX_DATA,
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&msg->payload, cnt);
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if (ret < 0)
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return ret;
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}
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reg = (PD_RETRY_COUNT << TCPC_TRANSMIT_RETRY_SHIFT) |
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(type << TCPC_TRANSMIT_TYPE_SHIFT);
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ret = regmap_write(tcpci->regmap, TCPC_TRANSMIT, reg);
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if (ret < 0)
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return ret;
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return 0;
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}
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static int tcpci_init(struct tcpc_dev *tcpc)
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{
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struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
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unsigned long timeout = jiffies + msecs_to_jiffies(2000); /* XXX */
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unsigned int reg;
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int ret;
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while (time_before_eq(jiffies, timeout)) {
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ret = regmap_read(tcpci->regmap, TCPC_POWER_STATUS, ®);
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if (ret < 0)
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return ret;
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if (!(reg & TCPC_POWER_STATUS_UNINIT))
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break;
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usleep_range(10000, 20000);
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}
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if (time_after(jiffies, timeout))
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return -ETIMEDOUT;
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/* Clear all events */
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ret = tcpci_write16(tcpci, TCPC_ALERT, 0xffff);
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if (ret < 0)
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return ret;
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if (tcpci->controls_vbus)
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reg = TCPC_POWER_STATUS_VBUS_PRES;
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else
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reg = 0;
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ret = regmap_write(tcpci->regmap, TCPC_POWER_STATUS_MASK, reg);
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if (ret < 0)
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return ret;
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reg = TCPC_ALERT_TX_SUCCESS | TCPC_ALERT_TX_FAILED |
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TCPC_ALERT_TX_DISCARDED | TCPC_ALERT_RX_STATUS |
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TCPC_ALERT_RX_HARD_RST | TCPC_ALERT_CC_STATUS;
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if (tcpci->controls_vbus)
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reg |= TCPC_ALERT_POWER_STATUS;
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return tcpci_write16(tcpci, TCPC_ALERT_MASK, reg);
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}
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static irqreturn_t tcpci_irq(int irq, void *dev_id)
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{
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struct tcpci *tcpci = dev_id;
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unsigned int status, reg;
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tcpci_read16(tcpci, TCPC_ALERT, &status);
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/*
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* Clear alert status for everything except RX_STATUS, which shouldn't
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* be cleared until we have successfully retrieved message.
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*/
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if (status & ~TCPC_ALERT_RX_STATUS)
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tcpci_write16(tcpci, TCPC_ALERT,
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status & ~TCPC_ALERT_RX_STATUS);
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if (status & TCPC_ALERT_CC_STATUS)
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tcpm_cc_change(tcpci->port);
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if (status & TCPC_ALERT_POWER_STATUS) {
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regmap_read(tcpci->regmap, TCPC_POWER_STATUS_MASK, ®);
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/*
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* If power status mask has been reset, then the TCPC
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* has reset.
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*/
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if (reg == 0xff)
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tcpm_tcpc_reset(tcpci->port);
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else
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tcpm_vbus_change(tcpci->port);
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}
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if (status & TCPC_ALERT_RX_STATUS) {
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struct pd_message msg;
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unsigned int cnt;
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regmap_read(tcpci->regmap, TCPC_RX_BYTE_CNT, &cnt);
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tcpci_read16(tcpci, TCPC_RX_HDR, ®);
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msg.header = reg;
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if (WARN_ON(cnt > sizeof(msg.payload)))
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cnt = sizeof(msg.payload);
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if (cnt > 0)
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regmap_raw_read(tcpci->regmap, TCPC_RX_DATA,
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&msg.payload, cnt);
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/* Read complete, clear RX status alert bit */
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tcpci_write16(tcpci, TCPC_ALERT, TCPC_ALERT_RX_STATUS);
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tcpm_pd_receive(tcpci->port, &msg);
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}
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if (status & TCPC_ALERT_RX_HARD_RST)
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tcpm_pd_hard_reset(tcpci->port);
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if (status & TCPC_ALERT_TX_SUCCESS)
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tcpm_pd_transmit_complete(tcpci->port, TCPC_TX_SUCCESS);
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else if (status & TCPC_ALERT_TX_DISCARDED)
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tcpm_pd_transmit_complete(tcpci->port, TCPC_TX_DISCARDED);
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else if (status & TCPC_ALERT_TX_FAILED)
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tcpm_pd_transmit_complete(tcpci->port, TCPC_TX_FAILED);
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return IRQ_HANDLED;
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}
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static const struct regmap_config tcpci_regmap_config = {
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.reg_bits = 8,
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.val_bits = 8,
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.max_register = 0x7F, /* 0x80 .. 0xFF are vendor defined */
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};
|
||||
|
||||
const struct tcpc_config tcpci_tcpc_config = {
|
||||
.type = TYPEC_PORT_DFP,
|
||||
.default_role = TYPEC_SINK,
|
||||
};
|
||||
|
||||
static int tcpci_parse_config(struct tcpci *tcpci)
|
||||
{
|
||||
tcpci->controls_vbus = true; /* XXX */
|
||||
|
||||
/* TODO: Populate struct tcpc_config from ACPI/device-tree */
|
||||
tcpci->tcpc.config = &tcpci_tcpc_config;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int tcpci_probe(struct i2c_client *client,
|
||||
const struct i2c_device_id *i2c_id)
|
||||
{
|
||||
struct tcpci *tcpci;
|
||||
int err;
|
||||
|
||||
tcpci = devm_kzalloc(&client->dev, sizeof(*tcpci), GFP_KERNEL);
|
||||
if (!tcpci)
|
||||
return -ENOMEM;
|
||||
|
||||
tcpci->client = client;
|
||||
tcpci->dev = &client->dev;
|
||||
i2c_set_clientdata(client, tcpci);
|
||||
tcpci->regmap = devm_regmap_init_i2c(client, &tcpci_regmap_config);
|
||||
if (IS_ERR(tcpci->regmap))
|
||||
return PTR_ERR(tcpci->regmap);
|
||||
|
||||
tcpci->tcpc.init = tcpci_init;
|
||||
tcpci->tcpc.get_vbus = tcpci_get_vbus;
|
||||
tcpci->tcpc.set_vbus = tcpci_set_vbus;
|
||||
tcpci->tcpc.set_cc = tcpci_set_cc;
|
||||
tcpci->tcpc.get_cc = tcpci_get_cc;
|
||||
tcpci->tcpc.set_polarity = tcpci_set_polarity;
|
||||
tcpci->tcpc.set_vconn = tcpci_set_vconn;
|
||||
tcpci->tcpc.start_drp_toggling = tcpci_start_drp_toggling;
|
||||
|
||||
tcpci->tcpc.set_pd_rx = tcpci_set_pd_rx;
|
||||
tcpci->tcpc.set_roles = tcpci_set_roles;
|
||||
tcpci->tcpc.pd_transmit = tcpci_pd_transmit;
|
||||
|
||||
err = tcpci_parse_config(tcpci);
|
||||
if (err < 0)
|
||||
return err;
|
||||
|
||||
/* Disable chip interrupts */
|
||||
tcpci_write16(tcpci, TCPC_ALERT_MASK, 0);
|
||||
|
||||
err = devm_request_threaded_irq(tcpci->dev, client->irq, NULL,
|
||||
tcpci_irq,
|
||||
IRQF_ONESHOT | IRQF_TRIGGER_LOW,
|
||||
dev_name(tcpci->dev), tcpci);
|
||||
if (err < 0)
|
||||
return err;
|
||||
|
||||
tcpci->port = tcpm_register_port(tcpci->dev, &tcpci->tcpc);
|
||||
return PTR_ERR_OR_ZERO(tcpci->port);
|
||||
}
|
||||
|
||||
static int tcpci_remove(struct i2c_client *client)
|
||||
{
|
||||
struct tcpci *tcpci = i2c_get_clientdata(client);
|
||||
|
||||
tcpm_unregister_port(tcpci->port);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct i2c_device_id tcpci_id[] = {
|
||||
{ "tcpci", 0 },
|
||||
{ }
|
||||
};
|
||||
MODULE_DEVICE_TABLE(i2c, tcpci_id);
|
||||
|
||||
#ifdef CONFIG_OF
|
||||
static const struct of_device_id tcpci_of_match[] = {
|
||||
{ .compatible = "usb,tcpci", },
|
||||
{},
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, tcpci_of_match);
|
||||
#endif
|
||||
|
||||
static struct i2c_driver tcpci_i2c_driver = {
|
||||
.driver = {
|
||||
.name = "tcpci",
|
||||
.of_match_table = of_match_ptr(tcpci_of_match),
|
||||
},
|
||||
.probe = tcpci_probe,
|
||||
.remove = tcpci_remove,
|
||||
.id_table = tcpci_id,
|
||||
};
|
||||
module_i2c_driver(tcpci_i2c_driver);
|
||||
|
||||
MODULE_DESCRIPTION("USB Type-C Port Controller Interface driver");
|
||||
MODULE_LICENSE("GPL");
|
||||
133
drivers/staging/typec/tcpci.h
Normal file
133
drivers/staging/typec/tcpci.h
Normal file
@ -0,0 +1,133 @@
|
||||
/*
|
||||
* Copyright 2015-2017 Google, Inc
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* USB Type-C Port Controller Interface.
|
||||
*/
|
||||
|
||||
#ifndef __LINUX_USB_TCPCI_H
|
||||
#define __LINUX_USB_TCPCI_H
|
||||
|
||||
#define TCPC_VENDOR_ID 0x0
|
||||
#define TCPC_PRODUCT_ID 0x2
|
||||
#define TCPC_BCD_DEV 0x4
|
||||
#define TCPC_TC_REV 0x6
|
||||
#define TCPC_PD_REV 0x8
|
||||
#define TCPC_PD_INT_REV 0xa
|
||||
|
||||
#define TCPC_ALERT 0x10
|
||||
#define TCPC_ALERT_VBUS_DISCNCT BIT(11)
|
||||
#define TCPC_ALERT_RX_BUF_OVF BIT(10)
|
||||
#define TCPC_ALERT_FAULT BIT(9)
|
||||
#define TCPC_ALERT_V_ALARM_LO BIT(8)
|
||||
#define TCPC_ALERT_V_ALARM_HI BIT(7)
|
||||
#define TCPC_ALERT_TX_SUCCESS BIT(6)
|
||||
#define TCPC_ALERT_TX_DISCARDED BIT(5)
|
||||
#define TCPC_ALERT_TX_FAILED BIT(4)
|
||||
#define TCPC_ALERT_RX_HARD_RST BIT(3)
|
||||
#define TCPC_ALERT_RX_STATUS BIT(2)
|
||||
#define TCPC_ALERT_POWER_STATUS BIT(1)
|
||||
#define TCPC_ALERT_CC_STATUS BIT(0)
|
||||
|
||||
#define TCPC_ALERT_MASK 0x12
|
||||
#define TCPC_POWER_STATUS_MASK 0x14
|
||||
#define TCPC_FAULT_STATUS_MASK 0x15
|
||||
#define TCPC_CONFIG_STD_OUTPUT 0x18
|
||||
|
||||
#define TCPC_TCPC_CTRL 0x19
|
||||
#define TCPC_TCPC_CTRL_ORIENTATION BIT(0)
|
||||
|
||||
#define TCPC_ROLE_CTRL 0x1a
|
||||
#define TCPC_ROLE_CTRL_DRP BIT(6)
|
||||
#define TCPC_ROLE_CTRL_RP_VAL_SHIFT 4
|
||||
#define TCPC_ROLE_CTRL_RP_VAL_MASK 0x3
|
||||
#define TCPC_ROLE_CTRL_RP_VAL_DEF 0x0
|
||||
#define TCPC_ROLE_CTRL_RP_VAL_1_5 0x1
|
||||
#define TCPC_ROLE_CTRL_RP_VAL_3_0 0x2
|
||||
#define TCPC_ROLE_CTRL_CC2_SHIFT 2
|
||||
#define TCPC_ROLE_CTRL_CC2_MASK 0x3
|
||||
#define TCPC_ROLE_CTRL_CC1_SHIFT 0
|
||||
#define TCPC_ROLE_CTRL_CC1_MASK 0x3
|
||||
#define TCPC_ROLE_CTRL_CC_RA 0x0
|
||||
#define TCPC_ROLE_CTRL_CC_RP 0x1
|
||||
#define TCPC_ROLE_CTRL_CC_RD 0x2
|
||||
#define TCPC_ROLE_CTRL_CC_OPEN 0x3
|
||||
|
||||
#define TCPC_FAULT_CTRL 0x1b
|
||||
|
||||
#define TCPC_POWER_CTRL 0x1c
|
||||
#define TCPC_POWER_CTRL_VCONN_ENABLE BIT(0)
|
||||
|
||||
#define TCPC_CC_STATUS 0x1d
|
||||
#define TCPC_CC_STATUS_TERM BIT(4)
|
||||
#define TCPC_CC_STATUS_CC2_SHIFT 2
|
||||
#define TCPC_CC_STATUS_CC2_MASK 0x3
|
||||
#define TCPC_CC_STATUS_CC1_SHIFT 0
|
||||
#define TCPC_CC_STATUS_CC1_MASK 0x3
|
||||
|
||||
#define TCPC_POWER_STATUS 0x1e
|
||||
#define TCPC_POWER_STATUS_UNINIT BIT(6)
|
||||
#define TCPC_POWER_STATUS_VBUS_DET BIT(3)
|
||||
#define TCPC_POWER_STATUS_VBUS_PRES BIT(2)
|
||||
|
||||
#define TCPC_FAULT_STATUS 0x1f
|
||||
|
||||
#define TCPC_COMMAND 0x23
|
||||
#define TCPC_CMD_WAKE_I2C 0x11
|
||||
#define TCPC_CMD_DISABLE_VBUS_DETECT 0x22
|
||||
#define TCPC_CMD_ENABLE_VBUS_DETECT 0x33
|
||||
#define TCPC_CMD_DISABLE_SINK_VBUS 0x44
|
||||
#define TCPC_CMD_SINK_VBUS 0x55
|
||||
#define TCPC_CMD_DISABLE_SRC_VBUS 0x66
|
||||
#define TCPC_CMD_SRC_VBUS_DEFAULT 0x77
|
||||
#define TCPC_CMD_SRC_VBUS_HIGH 0x88
|
||||
#define TCPC_CMD_LOOK4CONNECTION 0x99
|
||||
#define TCPC_CMD_RXONEMORE 0xAA
|
||||
#define TCPC_CMD_I2C_IDLE 0xFF
|
||||
|
||||
#define TCPC_DEV_CAP_1 0x24
|
||||
#define TCPC_DEV_CAP_2 0x26
|
||||
#define TCPC_STD_INPUT_CAP 0x28
|
||||
#define TCPC_STD_OUTPUT_CAP 0x29
|
||||
|
||||
#define TCPC_MSG_HDR_INFO 0x2e
|
||||
#define TCPC_MSG_HDR_INFO_DATA_ROLE BIT(3)
|
||||
#define TCPC_MSG_HDR_INFO_PWR_ROLE BIT(0)
|
||||
#define TCPC_MSG_HDR_INFO_REV_SHIFT 1
|
||||
#define TCPC_MSG_HDR_INFO_REV_MASK 0x3
|
||||
|
||||
#define TCPC_RX_DETECT 0x2f
|
||||
#define TCPC_RX_DETECT_HARD_RESET BIT(5)
|
||||
#define TCPC_RX_DETECT_SOP BIT(0)
|
||||
|
||||
#define TCPC_RX_BYTE_CNT 0x30
|
||||
#define TCPC_RX_BUF_FRAME_TYPE 0x31
|
||||
#define TCPC_RX_HDR 0x32
|
||||
#define TCPC_RX_DATA 0x34 /* through 0x4f */
|
||||
|
||||
#define TCPC_TRANSMIT 0x50
|
||||
#define TCPC_TRANSMIT_RETRY_SHIFT 4
|
||||
#define TCPC_TRANSMIT_RETRY_MASK 0x3
|
||||
#define TCPC_TRANSMIT_TYPE_SHIFT 0
|
||||
#define TCPC_TRANSMIT_TYPE_MASK 0x7
|
||||
|
||||
#define TCPC_TX_BYTE_CNT 0x51
|
||||
#define TCPC_TX_HDR 0x52
|
||||
#define TCPC_TX_DATA 0x54 /* through 0x6f */
|
||||
|
||||
#define TCPC_VBUS_VOLTAGE 0x70
|
||||
#define TCPC_VBUS_SINK_DISCONNECT_THRESH 0x72
|
||||
#define TCPC_VBUS_STOP_DISCHARGE_THRESH 0x74
|
||||
#define TCPC_VBUS_VOLTAGE_ALARM_HI_CFG 0x76
|
||||
#define TCPC_VBUS_VOLTAGE_ALARM_LO_CFG 0x78
|
||||
|
||||
#endif /* __LINUX_USB_TCPCI_H */
|
||||
Loading…
Reference in New Issue
Block a user