mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-25 06:10:54 +07:00
Merge branch 'omap-for-v4.10/legacy' into omap-for-v4.10/fixes
This commit is contained in:
Tony Lindgren
commit
74de7126fc
@ -7,7 +7,7 @@ ccflags-y := -I$(srctree)/$(src)/include \
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# Common support
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obj-y := id.o io.o control.o devices.o fb.o timer.o pm.o \
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common.o gpio.o dma.o wd_timer.o display.o i2c.o hdq1w.o omap_hwmod.o \
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common.o dma.o wd_timer.o display.o i2c.o hdq1w.o omap_hwmod.o \
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omap_device.o omap-headsmp.o sram.o drm.o
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hwmod-common = omap_hwmod.o omap_hwmod_reset.o \
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@ -1,160 +0,0 @@
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/*
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* OMAP2+ specific gpio initialization
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*
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* Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
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*
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* Author:
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* Charulatha V <charu@ti.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation version 2.
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*
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* This program is distributed "as is" WITHOUT ANY WARRANTY of any
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* kind, whether express or implied; without even the implied warranty
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* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/gpio.h>
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#include <linux/err.h>
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#include <linux/slab.h>
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#include <linux/interrupt.h>
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#include <linux/of.h>
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#include <linux/platform_data/gpio-omap.h>
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#include "soc.h"
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#include "omap_hwmod.h"
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#include "omap_device.h"
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#include "omap-pm.h"
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#include "powerdomain.h"
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static int __init omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
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{
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struct platform_device *pdev;
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struct omap_gpio_platform_data *pdata;
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struct omap_gpio_dev_attr *dev_attr;
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char *name = "omap_gpio";
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int id;
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struct powerdomain *pwrdm;
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/*
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* extract the device id from name field available in the
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* hwmod database and use the same for constructing ids for
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* gpio devices.
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* CAUTION: Make sure the name in the hwmod database does
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* not change. If changed, make corresponding change here
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* or make use of static variable mechanism to handle this.
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*/
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sscanf(oh->name, "gpio%d", &id);
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pdata = kzalloc(sizeof(struct omap_gpio_platform_data), GFP_KERNEL);
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if (!pdata) {
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pr_err("gpio%d: Memory allocation failed\n", id);
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return -ENOMEM;
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}
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dev_attr = (struct omap_gpio_dev_attr *)oh->dev_attr;
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pdata->bank_width = dev_attr->bank_width;
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pdata->dbck_flag = dev_attr->dbck_flag;
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pdata->get_context_loss_count = omap_pm_get_dev_context_loss_count;
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pdata->regs = kzalloc(sizeof(struct omap_gpio_reg_offs), GFP_KERNEL);
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if (!pdata->regs) {
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pr_err("gpio%d: Memory allocation failed\n", id);
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kfree(pdata);
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return -ENOMEM;
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}
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switch (oh->class->rev) {
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case 0:
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if (id == 1)
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/* non-wakeup GPIO pins for OMAP2 Bank1 */
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pdata->non_wakeup_gpios = 0xe203ffc0;
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else if (id == 2)
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/* non-wakeup GPIO pins for OMAP2 Bank2 */
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pdata->non_wakeup_gpios = 0x08700040;
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/* fall through */
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case 1:
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pdata->regs->revision = OMAP24XX_GPIO_REVISION;
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pdata->regs->direction = OMAP24XX_GPIO_OE;
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pdata->regs->datain = OMAP24XX_GPIO_DATAIN;
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pdata->regs->dataout = OMAP24XX_GPIO_DATAOUT;
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pdata->regs->set_dataout = OMAP24XX_GPIO_SETDATAOUT;
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pdata->regs->clr_dataout = OMAP24XX_GPIO_CLEARDATAOUT;
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pdata->regs->irqstatus = OMAP24XX_GPIO_IRQSTATUS1;
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pdata->regs->irqstatus2 = OMAP24XX_GPIO_IRQSTATUS2;
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pdata->regs->irqenable = OMAP24XX_GPIO_IRQENABLE1;
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pdata->regs->irqenable2 = OMAP24XX_GPIO_IRQENABLE2;
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pdata->regs->set_irqenable = OMAP24XX_GPIO_SETIRQENABLE1;
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pdata->regs->clr_irqenable = OMAP24XX_GPIO_CLEARIRQENABLE1;
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pdata->regs->debounce = OMAP24XX_GPIO_DEBOUNCE_VAL;
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pdata->regs->debounce_en = OMAP24XX_GPIO_DEBOUNCE_EN;
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pdata->regs->ctrl = OMAP24XX_GPIO_CTRL;
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pdata->regs->wkup_en = OMAP24XX_GPIO_WAKE_EN;
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pdata->regs->leveldetect0 = OMAP24XX_GPIO_LEVELDETECT0;
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pdata->regs->leveldetect1 = OMAP24XX_GPIO_LEVELDETECT1;
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pdata->regs->risingdetect = OMAP24XX_GPIO_RISINGDETECT;
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pdata->regs->fallingdetect = OMAP24XX_GPIO_FALLINGDETECT;
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break;
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case 2:
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pdata->regs->revision = OMAP4_GPIO_REVISION;
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pdata->regs->direction = OMAP4_GPIO_OE;
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pdata->regs->datain = OMAP4_GPIO_DATAIN;
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pdata->regs->dataout = OMAP4_GPIO_DATAOUT;
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pdata->regs->set_dataout = OMAP4_GPIO_SETDATAOUT;
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pdata->regs->clr_dataout = OMAP4_GPIO_CLEARDATAOUT;
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pdata->regs->irqstatus_raw0 = OMAP4_GPIO_IRQSTATUSRAW0;
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pdata->regs->irqstatus_raw1 = OMAP4_GPIO_IRQSTATUSRAW1;
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pdata->regs->irqstatus = OMAP4_GPIO_IRQSTATUS0;
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pdata->regs->irqstatus2 = OMAP4_GPIO_IRQSTATUS1;
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pdata->regs->irqenable = OMAP4_GPIO_IRQSTATUSSET0;
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pdata->regs->irqenable2 = OMAP4_GPIO_IRQSTATUSSET1;
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pdata->regs->set_irqenable = OMAP4_GPIO_IRQSTATUSSET0;
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pdata->regs->clr_irqenable = OMAP4_GPIO_IRQSTATUSCLR0;
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pdata->regs->debounce = OMAP4_GPIO_DEBOUNCINGTIME;
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pdata->regs->debounce_en = OMAP4_GPIO_DEBOUNCENABLE;
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pdata->regs->ctrl = OMAP4_GPIO_CTRL;
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pdata->regs->wkup_en = OMAP4_GPIO_IRQWAKEN0;
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pdata->regs->leveldetect0 = OMAP4_GPIO_LEVELDETECT0;
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pdata->regs->leveldetect1 = OMAP4_GPIO_LEVELDETECT1;
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pdata->regs->risingdetect = OMAP4_GPIO_RISINGDETECT;
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pdata->regs->fallingdetect = OMAP4_GPIO_FALLINGDETECT;
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break;
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default:
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WARN(1, "Invalid gpio bank_type\n");
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kfree(pdata->regs);
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kfree(pdata);
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return -EINVAL;
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}
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pwrdm = omap_hwmod_get_pwrdm(oh);
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pdata->loses_context = pwrdm_can_ever_lose_context(pwrdm);
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pdev = omap_device_build(name, id - 1, oh, pdata, sizeof(*pdata));
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kfree(pdata);
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if (IS_ERR(pdev)) {
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WARN(1, "Can't build omap_device for %s:%s.\n",
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name, oh->name);
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return PTR_ERR(pdev);
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}
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return 0;
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}
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/*
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* gpio_init needs to be done before
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* machine_init functions access gpio APIs.
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* Hence gpio_init is a omap_postcore_initcall.
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*/
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static int __init omap2_gpio_init(void)
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{
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/* If dtb is there, the devices will be created dynamically */
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if (of_have_populated_dt())
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return -ENODEV;
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return omap_hwmod_for_each_by_class("gpio", omap2_gpio_dev_init, NULL);
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}
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omap_postcore_initcall(omap2_gpio_init);
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@ -121,10 +121,6 @@ extern struct omap_hwmod_irq_info omap2_uart3_mpu_irqs[];
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extern struct omap_hwmod_irq_info omap2_dispc_irqs[];
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extern struct omap_hwmod_irq_info omap2_i2c1_mpu_irqs[];
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extern struct omap_hwmod_irq_info omap2_i2c2_mpu_irqs[];
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extern struct omap_hwmod_irq_info omap2_gpio1_irqs[];
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extern struct omap_hwmod_irq_info omap2_gpio2_irqs[];
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extern struct omap_hwmod_irq_info omap2_gpio3_irqs[];
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extern struct omap_hwmod_irq_info omap2_gpio4_irqs[];
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extern struct omap_hwmod_irq_info omap2_dma_system_irqs[];
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extern struct omap_hwmod_irq_info omap2_mcspi1_mpu_irqs[];
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extern struct omap_hwmod_irq_info omap2_mcspi2_mpu_irqs[];
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