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ARM: mx5/clock-mx51: new macro that defines a clk with all members
Acked-by: Jason Wang <jason77.wang@gmail.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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@ -764,21 +764,21 @@ static struct clk kpp_clk = {
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.id = 0,
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};
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#define DEFINE_CLOCK(name, i, er, es, gr, sr, p, s) \
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static struct clk name = { \
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.id = i, \
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.enable_reg = er, \
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.enable_shift = es, \
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.get_rate = gr, \
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.set_rate = sr, \
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.enable = _clk_ccgr_enable, \
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.disable = _clk_ccgr_disable, \
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.parent = p, \
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.secondary = s, \
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#define DEFINE_CLOCK_FULL(name, i, er, es, gr, sr, e, d, p, s) \
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static struct clk name = { \
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.id = i, \
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.enable_reg = er, \
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.enable_shift = es, \
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.get_rate = gr, \
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.set_rate = sr, \
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.enable = e, \
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.disable = d, \
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.parent = p, \
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.secondary = s, \
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}
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/* DEFINE_CLOCK(name, id, enable_reg, enable_shift,
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get_rate, set_rate, parent, secondary); */
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#define DEFINE_CLOCK(name, i, er, es, gr, sr, p, s) \
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DEFINE_CLOCK_FULL(name, i, er, es, gr, sr, _clk_ccgr_enable, _clk_ccgr_disable, p, s)
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/* Shared peripheral bus arbiter */
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DEFINE_CLOCK(spba_clk, 0, MXC_CCM_CCGR5, MXC_CCM_CCGRx_CG0_OFFSET,
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