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[ARM] 3829/1: iop3xx: optimise irq entry macros
Squeeze three instructions out of the iop32x irq demuxer, and nine out of the iop33x irq demuxer by using the hardware vector generator. Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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@ -57,6 +57,20 @@ static inline void intstr_write1(u32 val)
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iop3xx_cp6_disable();
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}
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static inline void intbase_write(u32 val)
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{
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iop3xx_cp6_enable();
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asm volatile("mcr p6, 0, %0, c12, c0, 0" : : "r" (val));
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iop3xx_cp6_disable();
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}
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static inline void intsize_write(u32 val)
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{
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iop3xx_cp6_enable();
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asm volatile("mcr p6, 0, %0, c13, c0, 0" : : "r" (val));
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iop3xx_cp6_disable();
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}
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static void
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iop331_irq_mask1 (unsigned int irq)
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{
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@ -107,6 +121,8 @@ void __init iop331_init_irq(void)
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intctl_write1(0);
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intstr_write0(0); // treat all as IRQ
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intstr_write1(0);
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intbase_write(0);
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intsize_write(1);
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if(machine_is_iq80331()) // all interrupts are inputs to chip
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*IOP3XX_PCIIRSR = 0x0f;
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@ -16,13 +16,9 @@
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* Note: only deal with normal interrupts, not FIQ
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*/
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.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
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mov \irqnr, #0
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ldr \base, =IOP3XX_REG_ADDR(0x07D8)
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ldr \irqstat, [\base] @ Read IINTSRC
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cmp \irqstat, #0
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beq 1001f
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clz \irqnr, \irqstat
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mov \base, #31
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subs \irqnr,\base,\irqnr
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1001:
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cmp \irqstat, #0
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clzne \irqnr, \irqstat
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rsbne \irqnr, \irqnr, #31
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.endm
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@ -12,23 +12,11 @@
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.macro disable_fiq
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.endm
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/*
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* Note: only deal with normal interrupts, not FIQ
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*/
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.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
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mov \irqnr, #0
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ldr \base, =IOP3XX_REG_ADDR(0x7A0)
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ldr \irqstat, [\base] @ Read IINTSRC0
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cmp \irqstat, #0
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bne 1002f
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ldr \irqstat, [\base, #4] @ Read IINTSRC1
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ldr \base, =IOP3XX_REG_ADDR(0x07C8)
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ldr \irqstat, [\base] @ Read IINTVEC
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cmp \irqstat, #0
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beq 1001f
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clz \irqnr, \irqstat
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rsbs \irqnr,\irqnr,#31 @ recommend by RMK
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add \irqnr,\irqnr,#IRQ_IOP331_XINT8
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b 1001f
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1002: clz \irqnr, \irqstat
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rsbs \irqnr,\irqnr,#31 @ recommend by RMK
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1001:
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ldreq \irqstat, [\base] @ erratum 63 workaround
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adds \irqnr, \irqstat, #1
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movne \irqnr, \irqstat, lsr #2
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.endm
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