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drm/amd/display: Fix link retraining hw sequence for auto test

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Signed-off-by: Hersen Wu <hersenxs.wu@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Hersen Wu 2016-12-29 14:58:54 -05:00 committed by Alex Deucher
parent 886391680c
commit 73c7260292
4 changed files with 9 additions and 30 deletions
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4
drivers/gpu/drm/amd/display/dc/core/dc.c
View File

@ -366,9 +366,7 @@ static void set_preferred_link_settings(struct dc *dc,
link_setting->lane_count;
core_link->public.verified_link_cap.link_rate =
link_setting->link_rate;
dp_retrain_link_physi(core_link,
link_setting,
false);
dp_retrain_link_dp_test(core_link, link_setting, false);
}
static void enable_hpd(const struct dc_link *link)

4
drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
View File

@ -1532,7 +1532,7 @@ static bool handle_hpd_irq_psr_sink(const struct core_link *link)
static void dp_test_send_link_training(struct core_link *link)
{
struct dc_link_settings link_settings;
struct dc_link_settings link_settings = {0};
core_link_read_dpcd(
link,
@ -1549,7 +1549,7 @@ static void dp_test_send_link_training(struct core_link *link)
link->public.verified_link_cap.lane_count = link_settings.lane_count;
link->public.verified_link_cap.link_rate = link_settings.link_rate;
dp_retrain_link(link);
dp_retrain_link_dp_test(link, &link_settings, false);
}
static void dp_test_send_phy_test_pattern(struct core_link *link)

27
drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c
View File

@ -200,28 +200,7 @@ void dp_set_hw_test_pattern(
encoder->funcs->dp_set_phy_pattern(encoder, &pattern_param);
}
void dp_retrain_link(struct core_link *link)
{
struct pipe_ctx *pipes = link->dc->current_context->res_ctx.pipe_ctx;
unsigned int i;
for (i = 0; i < MAX_PIPES; i++) {
if (pipes[i].stream_enc != NULL) {
dm_delay_in_microseconds(link->ctx, 100);
pipes->stream_enc->funcs->dp_blank(pipes[i].stream_enc);
link->dc->hwss.disable_stream(&pipes[i]);
dc_link_dp_perform_link_training(
&link->public,
&link->public.verified_link_cap,
true);
link->dc->hwss.enable_stream(&pipes[i]);
link->dc->hwss.unblank_stream(&pipes[i],
&link->public.verified_link_cap);
}
}
}
void dp_retrain_link_physi(struct core_link *link,
void dp_retrain_link_dp_test(struct core_link *link,
struct dc_link_settings *link_setting,
bool skip_video_pattern)
{
@ -240,6 +219,10 @@ void dp_retrain_link_physi(struct core_link *link,
pipes[i].stream_enc->funcs->dp_blank(
pipes[i].stream_enc);
/* disable any test pattern that might be active */
dp_set_hw_test_pattern(link,
DP_TEST_PATTERN_VIDEO_MODE, NULL, 0);
dp_receiver_power_ctrl(link, false);
link->link_enc->funcs->disable_output(

4
drivers/gpu/drm/amd/display/dc/inc/link_hwss.h
View File

@ -68,9 +68,7 @@ void dp_set_hw_test_pattern(
enum dp_panel_mode dp_get_panel_mode(struct core_link *link);
void dp_retrain_link(struct core_link *link);
void dp_retrain_link_physi(struct core_link *link,
void dp_retrain_link_dp_test(struct core_link *link,
struct dc_link_settings *link_setting,
bool skip_video_pattern);