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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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clock: max77686: Add driver for Maxim 77686 32Khz crystal oscillator.
This patch supports max77686 mfd's clock driver using common clock frame work. max77686 has 3 clock ouputs which all are generated from crystal oscillator and SOC can enable/disable them via I2C bus. All clocks are fixed-rate clock sources so that it doesn't supply interface for changing clock rate. Driver uses regmap API to communicate with internal register. Signed-off-by: Jonghwa Lee <jonghwa3.lee@samsung.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
This commit is contained in:
Jonghwa Lee
Mike Turquette
parent
ebc96db763
commit
73118e6188
@ -47,4 +47,10 @@ config COMMON_CLK_VERSATILE
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Supports clocking on ARM Reference designs Integrator/AP,
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Integrator/CP, RealView PB1176, EB, PB11MP and PBX.
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config COMMON_CLK_MAX77686
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tristate "Clock driver for Maxim 77686 MFD"
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depends on MFD_MAX77686
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---help---
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This driver supports Maxim 77686 crystal oscillator clock.
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endmenu
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@ -19,3 +19,4 @@ obj-$(CONFIG_ARCH_U8500) += ux500/
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# Chip specific
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obj-$(CONFIG_COMMON_CLK_WM831X) += clk-wm831x.o
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obj-$(CONFIG_COMMON_CLK_MAX77686) += clk-max77686.o
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244
drivers/clk/clk-max77686.c
Normal file
244
drivers/clk/clk-max77686.c
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@ -0,0 +1,244 @@
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/*
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* clk-max77686.c - Clock driver for Maxim 77686
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*
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* Copyright (C) 2012 Samsung Electornics
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* Jonghwa Lee <jonghwa3.lee@samsung.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*
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*/
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#include <linux/kernel.h>
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#include <linux/slab.h>
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#include <linux/err.h>
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#include <linux/platform_device.h>
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#include <linux/mfd/max77686.h>
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#include <linux/mfd/max77686-private.h>
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#include <linux/clk-provider.h>
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#include <linux/mutex.h>
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#include <linux/clkdev.h>
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enum {
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MAX77686_CLK_AP = 0,
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MAX77686_CLK_CP,
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MAX77686_CLK_PMIC,
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MAX77686_CLKS_NUM,
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};
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struct max77686_clk {
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struct max77686_dev *iodev;
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u32 mask;
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struct clk_hw hw;
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struct clk_lookup *lookup;
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};
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static struct max77686_clk *get_max77686_clk(struct clk_hw *hw)
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{
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return container_of(hw, struct max77686_clk, hw);
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}
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static int max77686_clk_prepare(struct clk_hw *hw)
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{
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struct max77686_clk *max77686;
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int ret;
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max77686 = get_max77686_clk(hw);
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if (!max77686)
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return -ENOMEM;
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ret = regmap_update_bits(max77686->iodev->regmap,
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MAX77686_REG_32KHZ, max77686->mask, max77686->mask);
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return ret;
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}
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static void max77686_clk_unprepare(struct clk_hw *hw)
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{
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struct max77686_clk *max77686;
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max77686 = get_max77686_clk(hw);
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if (!max77686)
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return;
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regmap_update_bits(max77686->iodev->regmap,
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MAX77686_REG_32KHZ, max77686->mask, ~max77686->mask);
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}
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static int max77686_clk_is_enabled(struct clk_hw *hw)
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{
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struct max77686_clk *max77686;
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int ret;
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u32 val;
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max77686 = get_max77686_clk(hw);
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if (!max77686)
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return -ENOMEM;
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ret = regmap_read(max77686->iodev->regmap,
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MAX77686_REG_32KHZ, &val);
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if (ret < 0)
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return -EINVAL;
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return val & max77686->mask;
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}
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static struct clk_ops max77686_clk_ops = {
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.prepare = max77686_clk_prepare,
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.unprepare = max77686_clk_unprepare,
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.is_enabled = max77686_clk_is_enabled,
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};
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static struct clk_init_data max77686_clks_init[MAX77686_CLKS_NUM] = {
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[MAX77686_CLK_AP] = {
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.name = "32khz_ap",
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.ops = &max77686_clk_ops,
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.flags = CLK_IS_ROOT,
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},
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[MAX77686_CLK_CP] = {
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.name = "32khz_cp",
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.ops = &max77686_clk_ops,
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.flags = CLK_IS_ROOT,
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},
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[MAX77686_CLK_PMIC] = {
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.name = "32khz_pmic",
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.ops = &max77686_clk_ops,
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.flags = CLK_IS_ROOT,
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},
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};
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static int max77686_clk_register(struct device *dev,
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struct max77686_clk *max77686)
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{
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struct clk *clk;
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struct clk_hw *hw = &max77686->hw;
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clk = clk_register(dev, hw);
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if (IS_ERR(clk))
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return -ENOMEM;
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max77686->lookup = devm_kzalloc(dev, sizeof(struct clk_lookup),
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GFP_KERNEL);
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if (IS_ERR(max77686->lookup))
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return -ENOMEM;
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max77686->lookup->con_id = hw->init->name;
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max77686->lookup->clk = clk;
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clkdev_add(max77686->lookup);
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return 0;
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}
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static __devinit int max77686_clk_probe(struct platform_device *pdev)
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{
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struct max77686_dev *iodev = dev_get_drvdata(pdev->dev.parent);
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struct max77686_clk **max77686_clks;
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int i, ret;
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max77686_clks = devm_kzalloc(&pdev->dev, sizeof(struct max77686_clk *)
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* MAX77686_CLKS_NUM, GFP_KERNEL);
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if (IS_ERR(max77686_clks))
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return -ENOMEM;
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for (i = 0; i < MAX77686_CLKS_NUM; i++) {
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max77686_clks[i] = devm_kzalloc(&pdev->dev,
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sizeof(struct max77686_clk), GFP_KERNEL);
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if (IS_ERR(max77686_clks[i]))
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return -ENOMEM;
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}
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for (i = 0; i < MAX77686_CLKS_NUM; i++) {
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max77686_clks[i]->iodev = iodev;
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max77686_clks[i]->mask = 1 << i;
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max77686_clks[i]->hw.init = &max77686_clks_init[i];
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ret = max77686_clk_register(&pdev->dev, max77686_clks[i]);
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if (ret) {
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switch (i) {
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case MAX77686_CLK_AP:
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dev_err(&pdev->dev, "Fail to register CLK_AP\n");
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goto err_clk_ap;
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break;
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case MAX77686_CLK_CP:
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dev_err(&pdev->dev, "Fail to register CLK_CP\n");
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goto err_clk_cp;
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break;
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case MAX77686_CLK_PMIC:
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dev_err(&pdev->dev, "Fail to register CLK_PMIC\n");
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goto err_clk_pmic;
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}
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}
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}
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platform_set_drvdata(pdev, max77686_clks);
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goto out;
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err_clk_pmic:
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clkdev_drop(max77686_clks[MAX77686_CLK_CP]->lookup);
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kfree(max77686_clks[MAX77686_CLK_CP]->hw.clk);
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err_clk_cp:
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clkdev_drop(max77686_clks[MAX77686_CLK_AP]->lookup);
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kfree(max77686_clks[MAX77686_CLK_AP]->hw.clk);
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err_clk_ap:
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out:
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return ret;
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}
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static int __devexit max77686_clk_remove(struct platform_device *pdev)
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{
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struct max77686_clk **max77686_clks = platform_get_drvdata(pdev);
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int i;
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for (i = 0; i < MAX77686_CLKS_NUM; i++) {
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clkdev_drop(max77686_clks[i]->lookup);
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kfree(max77686_clks[i]->hw.clk);
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}
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return 0;
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}
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static const struct platform_device_id max77686_clk_id[] = {
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{ "max77686-clk", 0},
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{ },
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};
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MODULE_DEVICE_TABLE(platform, max77686_clk_id);
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static struct platform_driver max77686_clk_driver = {
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.driver = {
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.name = "max77686-clk",
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.owner = THIS_MODULE,
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},
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.probe = max77686_clk_probe,
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.remove = __devexit_p(max77686_clk_remove),
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.id_table = max77686_clk_id,
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};
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static int __init max77686_clk_init(void)
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{
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return platform_driver_register(&max77686_clk_driver);
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}
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subsys_initcall(max77686_clk_init);
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static void __init max77686_clk_cleanup(void)
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{
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platform_driver_unregister(&max77686_clk_driver);
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}
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module_exit(max77686_clk_cleanup);
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MODULE_DESCRIPTION("MAXIM 77686 Clock Driver");
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MODULE_AUTHOR("Jonghwa Lee <jonghwa3.lee@samsung.com>");
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MODULE_LICENSE("GPL");
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