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powerpc/time: refactor MFTB() to limit number of ifdefs

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The 8xx cannot access the TBL and TBU registers using mfspr/mtspr
It must be accessed using mftb/mftbu

Due to this, there is a number of places with #ifdef CONFIG_8xx

This patch defines new macros MFTBL(x) and MFTBU(x) on the same model
as MFTB(x) and tries to make use of them as much as possible.

In arch/powerpc/include/asm/timex.h, we also remove the ifdef
for the asm() operands as the compiler doesn't mind unused operands

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
This commit is contained in:
Christophe Leroy 2017-08-08 13:58:50 +02:00 committed by Michael Ellerman
parent de41ef6e4d
commit 72e4b2cdf0
5 changed files with 25 additions and 35 deletions
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8
arch/powerpc/boot/ppc_asm.h
View File

@ -80,4 +80,12 @@
.long 0xa6037b7d; /* mtsrr1 r11 */ \ .long 0xa6037b7d; /* mtsrr1 r11 */ \
.long 0x2400004c /* rfid */ .long 0x2400004c /* rfid */
#ifdef CONFIG_PPC_8xx
#define MFTBL(dest) mftb dest
#define MFTBU(dest) mftbu dest
#else
#define MFTBL(dest) mfspr dest, SPRN_TBRL
#define MFTBU(dest) mfspr dest, SPRN_TBRU
#endif
#endif /* _PPC64_PPC_ASM_H */ #endif /* _PPC64_PPC_ASM_H */

24
arch/powerpc/boot/util.S
View File

@ -71,32 +71,18 @@ udelay:
add r4,r4,r5 add r4,r4,r5
addi r4,r4,-1 addi r4,r4,-1
divw r4,r4,r5 /* BUS ticks */ divw r4,r4,r5 /* BUS ticks */
#ifdef CONFIG_8xx 1: MFTBU(r5)
1: mftbu r5 MFTBL(r6)
mftb r6 MFTBU(r7)
mftbu r7
#else
1: mfspr r5, SPRN_TBRU
mfspr r6, SPRN_TBRL
mfspr r7, SPRN_TBRU
#endif
cmpw 0,r5,r7 cmpw 0,r5,r7
bne 1b /* Get [synced] base time */ bne 1b /* Get [synced] base time */
addc r9,r6,r4 /* Compute end time */ addc r9,r6,r4 /* Compute end time */
addze r8,r5 addze r8,r5
#ifdef CONFIG_8xx 2: MFTBU(r5)
2: mftbu r5
#else
2: mfspr r5, SPRN_TBRU
#endif
cmpw 0,r5,r8 cmpw 0,r5,r8
blt 2b blt 2b
bgt 3f bgt 3f
#ifdef CONFIG_8xx MFTBL(r6)
mftb r6
#else
mfspr r6, SPRN_TBRL
#endif
cmpw 0,r6,r9 cmpw 0,r6,r9
blt 2b blt 2b
3: blr 3: blr

12
arch/powerpc/include/asm/ppc_asm.h
View File

@ -378,10 +378,16 @@ BEGIN_FTR_SECTION_NESTED(96); \
cmpwi dest,0; \ cmpwi dest,0; \
beq- 90b; \ beq- 90b; \
END_FTR_SECTION_NESTED(CPU_FTR_CELL_TB_BUG, CPU_FTR_CELL_TB_BUG, 96) END_FTR_SECTION_NESTED(CPU_FTR_CELL_TB_BUG, CPU_FTR_CELL_TB_BUG, 96)
#elif defined(CONFIG_8xx)
#define MFTB(dest) mftb dest
#else #else
#define MFTB(dest) mfspr dest, SPRN_TBRL #define MFTB(dest) MFTBL(dest)
#endif
#ifdef CONFIG_PPC_8xx
#define MFTBL(dest) mftb dest
#define MFTBU(dest) mftbu dest
#else
#define MFTBL(dest) mfspr dest, SPRN_TBRL
#define MFTBU(dest) mfspr dest, SPRN_TBRU
#endif #endif
#ifndef CONFIG_SMP #ifndef CONFIG_SMP

4
arch/powerpc/include/asm/timex.h
View File

@ -45,11 +45,7 @@ static inline cycles_t get_cycles(void)
" .long 0\n" " .long 0\n"
" .long 0\n" " .long 0\n"
".previous" ".previous"
#ifdef CONFIG_8xx
: "=r" (ret) : "i" (CPU_FTR_601));
#else
: "=r" (ret) : "i" (CPU_FTR_601), "i" (SPRN_TBRL)); : "=r" (ret) : "i" (CPU_FTR_601), "i" (SPRN_TBRL));
#endif
return ret; return ret;
#endif #endif
} }

12
arch/powerpc/kernel/vdso32/gettimeofday.S
View File

@ -232,15 +232,9 @@ __do_get_tspec:
lwz r6,(CFG_TB_ORIG_STAMP+4)(r9) lwz r6,(CFG_TB_ORIG_STAMP+4)(r9)
/* Get a stable TB value */ /* Get a stable TB value */
#ifdef CONFIG_8xx 2: MFTBU(r3)
2: mftbu r3 MFTBL(r4)
mftbl r4 MFTBU(r0)
mftbu r0
#else
2: mfspr r3, SPRN_TBRU
mfspr r4, SPRN_TBRL
mfspr r0, SPRN_TBRU
#endif
cmplw cr0,r3,r0 cmplw cr0,r3,r0
bne- 2b bne- 2b