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powerpc/time: refactor MFTB() to limit number of ifdefs
The 8xx cannot access the TBL and TBU registers using mfspr/mtspr It must be accessed using mftb/mftbu Due to this, there is a number of places with #ifdef CONFIG_8xx This patch defines new macros MFTBL(x) and MFTBU(x) on the same model as MFTB(x) and tries to make use of them as much as possible. In arch/powerpc/include/asm/timex.h, we also remove the ifdef for the asm() operands as the compiler doesn't mind unused operands Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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@ -80,4 +80,12 @@
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.long 0xa6037b7d; /* mtsrr1 r11 */ \
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.long 0x2400004c /* rfid */
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#ifdef CONFIG_PPC_8xx
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#define MFTBL(dest) mftb dest
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#define MFTBU(dest) mftbu dest
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#else
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#define MFTBL(dest) mfspr dest, SPRN_TBRL
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#define MFTBU(dest) mfspr dest, SPRN_TBRU
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#endif
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#endif /* _PPC64_PPC_ASM_H */
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@ -71,32 +71,18 @@ udelay:
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add r4,r4,r5
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addi r4,r4,-1
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divw r4,r4,r5 /* BUS ticks */
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#ifdef CONFIG_8xx
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1: mftbu r5
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mftb r6
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mftbu r7
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#else
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1: mfspr r5, SPRN_TBRU
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mfspr r6, SPRN_TBRL
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mfspr r7, SPRN_TBRU
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#endif
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1: MFTBU(r5)
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MFTBL(r6)
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MFTBU(r7)
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cmpw 0,r5,r7
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bne 1b /* Get [synced] base time */
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addc r9,r6,r4 /* Compute end time */
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addze r8,r5
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#ifdef CONFIG_8xx
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2: mftbu r5
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#else
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2: mfspr r5, SPRN_TBRU
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#endif
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2: MFTBU(r5)
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cmpw 0,r5,r8
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blt 2b
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bgt 3f
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#ifdef CONFIG_8xx
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mftb r6
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#else
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mfspr r6, SPRN_TBRL
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#endif
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MFTBL(r6)
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cmpw 0,r6,r9
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blt 2b
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3: blr
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@ -378,10 +378,16 @@ BEGIN_FTR_SECTION_NESTED(96); \
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cmpwi dest,0; \
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beq- 90b; \
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END_FTR_SECTION_NESTED(CPU_FTR_CELL_TB_BUG, CPU_FTR_CELL_TB_BUG, 96)
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#elif defined(CONFIG_8xx)
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#define MFTB(dest) mftb dest
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#else
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#define MFTB(dest) mfspr dest, SPRN_TBRL
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#define MFTB(dest) MFTBL(dest)
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#endif
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#ifdef CONFIG_PPC_8xx
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#define MFTBL(dest) mftb dest
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#define MFTBU(dest) mftbu dest
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#else
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#define MFTBL(dest) mfspr dest, SPRN_TBRL
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#define MFTBU(dest) mfspr dest, SPRN_TBRU
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#endif
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#ifndef CONFIG_SMP
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@ -45,11 +45,7 @@ static inline cycles_t get_cycles(void)
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" .long 0\n"
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" .long 0\n"
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".previous"
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#ifdef CONFIG_8xx
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: "=r" (ret) : "i" (CPU_FTR_601));
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#else
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: "=r" (ret) : "i" (CPU_FTR_601), "i" (SPRN_TBRL));
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#endif
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return ret;
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#endif
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}
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@ -232,15 +232,9 @@ __do_get_tspec:
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lwz r6,(CFG_TB_ORIG_STAMP+4)(r9)
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/* Get a stable TB value */
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#ifdef CONFIG_8xx
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2: mftbu r3
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mftbl r4
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mftbu r0
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#else
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2: mfspr r3, SPRN_TBRU
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mfspr r4, SPRN_TBRL
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mfspr r0, SPRN_TBRU
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#endif
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2: MFTBU(r3)
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MFTBL(r4)
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MFTBU(r0)
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cmplw cr0,r3,r0
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bne- 2b
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