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drm/mgag200: Set pitch in a separate helper function

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The framebuffer's pitch is now set in mgag200_set_offset().

v2:
	* move offset and bpp-shift calculation into helper functions
	* use u8 instead of uint8_t
	* add MGAREG_CRTCEXT0_OFFSET_MASK

Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
Tested-by: John Donnelly <John.p.donnelly@oracle.com>
Acked-by: Sam Ravnborg <sam@ravnborg.org>
Acked-by: Emil Velikov <emil.velikov@collabora.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200515083233.32036-8-tzimmermann@suse.de
This commit is contained in:
Thomas Zimmermann 2020-05-15 10:32:25 +02:00
parent ddb8d0520b
commit 72a03a358c
2 changed files with 45 additions and 14 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

57
drivers/gpu/drm/mgag200/mgag200_mode.c
View File

@ -1002,6 +1002,48 @@ static void mgag200_set_mode_regs(struct mga_device *mdev,
mga_crtc_set_plls(mdev, mode->clock);
}
static u8 mgag200_get_bpp_shift(struct mga_device *mdev,
const struct drm_format_info *format)
{
return mdev->bpp_shifts[format->cpp[0] - 1];
}
/*
* Calculates the HW offset value from the framebuffer's pitch. The
* offset is a multiple of the pixel size and depends on the display
* format.
*/
static u32 mgag200_calculate_offset(struct mga_device *mdev,
const struct drm_framebuffer *fb)
{
u32 offset = fb->pitches[0] / fb->format->cpp[0];
u8 bppshift = mgag200_get_bpp_shift(mdev, fb->format);
if (fb->format->cpp[0] * 8 == 24)
offset = (offset * 3) >> (4 - bppshift);
else
offset = offset >> (4 - bppshift);
return offset;
}
static void mgag200_set_offset(struct mga_device *mdev,
const struct drm_framebuffer *fb)
{
u8 crtc13, crtcext0;
u32 offset = mgag200_calculate_offset(mdev, fb);
RREG_ECRT(0, crtcext0);
crtc13 = offset & 0xff;
crtcext0 &= ~MGAREG_CRTCEXT0_OFFSET_MASK;
crtcext0 |= (offset >> 4) & MGAREG_CRTCEXT0_OFFSET_MASK;
WREG_CRT(0x13, crtc13);
WREG_ECRT(0x00, crtcext0);
}
static int mga_crtc_mode_set(struct drm_crtc *crtc,
struct drm_display_mode *mode,
struct drm_display_mode *adjusted_mode,
@ -1010,7 +1052,6 @@ static int mga_crtc_mode_set(struct drm_crtc *crtc,
struct drm_device *dev = crtc->dev;
struct mga_device *mdev = to_mga_device(dev);
const struct drm_framebuffer *fb = crtc->primary->fb;
int pitch;
int option = 0, option2 = 0;
int i;
unsigned char misc = 0;
@ -1121,12 +1162,6 @@ static int mga_crtc_mode_set(struct drm_crtc *crtc,
WREG_SEQ(3, 0);
WREG_SEQ(4, 0xe);
pitch = fb->pitches[0] / fb->format->cpp[0];
if (fb->format->cpp[0] * 8 == 24)
pitch = (pitch * 3) >> (4 - bppshift);
else
pitch = pitch >> (4 - bppshift);
WREG_GFX(0, 0);
WREG_GFX(1, 0);
WREG_GFX(2, 0);
@ -1143,20 +1178,15 @@ static int mga_crtc_mode_set(struct drm_crtc *crtc,
WREG_CRT(13, 0);
WREG_CRT(14, 0);
WREG_CRT(15, 0);
WREG_CRT(19, pitch & 0xFF);
ext_vga[0] = 0;
/* TODO interlace */
ext_vga[0] |= (pitch & 0x300) >> 4;
if (fb->format->cpp[0] * 8 == 24)
ext_vga[3] = (((1 << bppshift) * 3) - 1) | 0x80;
else
ext_vga[3] = ((1 << bppshift) - 1) | 0x80;
ext_vga[4] = 0;
WREG_ECRT(0, ext_vga[0]);
WREG_ECRT(3, ext_vga[3]);
WREG_ECRT(4, ext_vga[4]);
@ -1170,8 +1200,6 @@ static int mga_crtc_mode_set(struct drm_crtc *crtc,
WREG_ECRT(6, 0);
}
WREG_ECRT(0, ext_vga[0]);
misc = RREG8(MGA_MISC_IN);
misc |= MGAREG_MISC_IOADSEL |
MGAREG_MISC_RAMMAPEN |
@ -1179,6 +1207,7 @@ static int mga_crtc_mode_set(struct drm_crtc *crtc,
WREG8(MGA_MISC_OUT, misc);
mga_crtc_do_set_base(mdev, fb, old_fb);
mgag200_set_offset(mdev, fb);
mgag200_set_mode_regs(mdev, mode);

2
drivers/gpu/drm/mgag200/mgag200_reg.h
View File

@ -240,6 +240,8 @@
#define MGAREG_CRTCEXT_INDEX 0x1fde
#define MGAREG_CRTCEXT_DATA 0x1fdf
#define MGAREG_CRTCEXT0_OFFSET_MASK GENMASK(5, 4)
/* Cursor X and Y position */
#define MGA_CURPOSXL 0x3c0c
#define MGA_CURPOSXH 0x3c0d