AuxXxilium/linux_dsm_epyc7002
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net: axinet: Use of_property_read_u32 instead of open-coding it

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Use of_property_read_u32 instead of of_get_property with return value
checks and endianness conversion.

Signed-off-by: Tobias Klauser <tklauser@distanz.ch>
Reviewed-by: Sören Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Tobias Klauser 2015-09-23 09:20:55 +02:00 committed by David S. Miller
parent e734a42f04
commit 729bf329c7
1 changed files with 1 additions and 4 deletions
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5
drivers/net/ethernet/xilinx/xilinx_axienet_mdio.c
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@ -129,7 +129,6 @@ int axienet_mdio_setup(struct axienet_local *lp, struct device_node *np)
{ {
int ret; int ret;
u32 clk_div, host_clock; u32 clk_div, host_clock;
u32 *property_p;
struct mii_bus *bus; struct mii_bus *bus;
struct resource res; struct resource res;
struct device_node *np1; struct device_node *np1;
@ -168,8 +167,7 @@ int axienet_mdio_setup(struct axienet_local *lp, struct device_node *np)
clk_div = DEFAULT_CLOCK_DIVISOR; clk_div = DEFAULT_CLOCK_DIVISOR;
goto issue; goto issue;
} }
property_p = (u32 *) of_get_property(np1, "clock-frequency", NULL); if (of_property_read_u32(np1, "clock-frequency", &host_clock)) {
if (!property_p) {
netdev_warn(lp->ndev, "clock-frequency property not found.\n"); netdev_warn(lp->ndev, "clock-frequency property not found.\n");
netdev_warn(lp->ndev, netdev_warn(lp->ndev,
"Setting MDIO clock divisor to default %d\n", "Setting MDIO clock divisor to default %d\n",
@ -179,7 +177,6 @@ int axienet_mdio_setup(struct axienet_local *lp, struct device_node *np)
goto issue; goto issue;
} }
host_clock = be32_to_cpup(property_p);
clk_div = (host_clock / (MAX_MDIO_FREQ * 2)) - 1; clk_div = (host_clock / (MAX_MDIO_FREQ * 2)) - 1;
/* If there is any remainder from the division of /* If there is any remainder from the division of
* fHOST / (MAX_MDIO_FREQ * 2), then we need to add * fHOST / (MAX_MDIO_FREQ * 2), then we need to add