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ARM: OMAP3: Correct HWMOD DMTIMER SYSC register declarations
Currently, the OMAP3 HWMOD data defines two TIOCP_CFG register structures (referred to as the SYSC register in the HWMOD data) where timers 1, 2 and 10 use one of the defintions and the other timers use the other definition. For OMAP3 devices the structure of the DMTIMER TIOCP_CFG register is the same for all 12 instances of the DMTIMER. Please note that this is a difference between OMAP3 and OMAP4 and could be the source of the confusion. For OMAP3 devices, the DMTIMER TIOCP_CFG register has the fields, clock-activity, emufree, idlemode, enwakeup, softreset and autoidle for all 12 timers. Therefore, remove one of the SYSC register definitions for the DMTIMERs and ensure the appropriate register fields are defined for all DMTIMERs. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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@ -153,28 +153,13 @@ static struct omap_hwmod omap3xxx_debugss_hwmod = {
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};
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/* timer class */
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static struct omap_hwmod_class_sysconfig omap3xxx_timer_1ms_sysc = {
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.rev_offs = 0x0000,
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.sysc_offs = 0x0010,
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.syss_offs = 0x0014,
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.sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_CLOCKACTIVITY |
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SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
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SYSC_HAS_EMUFREE | SYSC_HAS_AUTOIDLE),
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.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
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.sysc_fields = &omap_hwmod_sysc_type1,
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};
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static struct omap_hwmod_class omap3xxx_timer_1ms_hwmod_class = {
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.name = "timer",
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.sysc = &omap3xxx_timer_1ms_sysc,
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};
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static struct omap_hwmod_class_sysconfig omap3xxx_timer_sysc = {
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.rev_offs = 0x0000,
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.sysc_offs = 0x0010,
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.syss_offs = 0x0014,
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.sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_ENAWAKEUP |
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SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE),
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.sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_CLOCKACTIVITY |
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SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
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SYSC_HAS_EMUFREE | SYSC_HAS_AUTOIDLE),
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.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
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.sysc_fields = &omap_hwmod_sysc_type1,
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};
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@ -224,7 +209,7 @@ static struct omap_hwmod omap3xxx_timer1_hwmod = {
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},
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},
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.dev_attr = &capability_alwon_dev_attr,
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.class = &omap3xxx_timer_1ms_hwmod_class,
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.class = &omap3xxx_timer_hwmod_class,
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};
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/* timer2 */
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@ -241,7 +226,7 @@ static struct omap_hwmod omap3xxx_timer2_hwmod = {
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.idlest_idle_bit = OMAP3430_ST_GPT2_SHIFT,
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},
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},
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.class = &omap3xxx_timer_1ms_hwmod_class,
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.class = &omap3xxx_timer_hwmod_class,
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};
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/* timer3 */
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@ -383,7 +368,7 @@ static struct omap_hwmod omap3xxx_timer10_hwmod = {
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},
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},
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.dev_attr = &capability_pwm_dev_attr,
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.class = &omap3xxx_timer_1ms_hwmod_class,
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.class = &omap3xxx_timer_hwmod_class,
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};
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/* timer11 */
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