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drm/i915/tgl: Make sure FBs have a correct CCS plane stride
The CCS plane stride must be fixed on TGL, as it's not configurable for the display. Instead the HW has a hardwired logic to determine it from the main plane stride. Make sure userspace passes in the correct stride. Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: Mika Kahola <mika.kahola@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Mika Kahola <mika.kahola@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20191221120543.22816-8-imre.deak@intel.com
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@ -2621,6 +2621,12 @@ bool is_ccs_modifier(u64 modifier)
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modifier == I915_FORMAT_MOD_Yf_TILED_CCS;
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}
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static int gen12_ccs_aux_stride(struct drm_framebuffer *fb, int ccs_plane)
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{
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return DIV_ROUND_UP(fb->pitches[ccs_to_main_plane(fb, ccs_plane)],
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512) * 64;
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}
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u32 intel_plane_fb_max_stride(struct drm_i915_private *dev_priv,
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u32 pixel_format, u64 modifier)
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{
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@ -16550,6 +16556,17 @@ static int intel_framebuffer_init(struct intel_framebuffer *intel_fb,
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goto err;
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}
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if (is_gen12_ccs_plane(fb, i)) {
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int ccs_aux_stride = gen12_ccs_aux_stride(fb, i);
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if (fb->pitches[i] != ccs_aux_stride) {
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DRM_DEBUG_KMS("ccs aux plane %d pitch (%d) must be %d\n",
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i,
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fb->pitches[i], ccs_aux_stride);
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goto err;
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}
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}
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fb->obj[i] = &obj->base;
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}
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