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MIPS: Netlogic: Update PIC access functions
Remove unused and trivial PIC accesss functions, update nlm_pic_send_ipi() and nlm_set_irt_to_cpu() to use similar logic, and use correct type for reg in nlm_pic_disable_irt(). Signed-off-by: Jayachandran C <jchandra@broadcom.com> Patchwork: http://patchwork.linux-mips.org/patch/4463 Signed-off-by: John Crispin <blogic@openwrt.org>
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@ -273,36 +273,16 @@ nlm_pic_read_irt(uint64_t base, int irt_index)
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return nlm_read_pic_reg(base, PIC_IRT(irt_index));
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}
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static inline uint64_t
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nlm_pic_read_control(uint64_t base)
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{
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return nlm_read_pic_reg(base, PIC_CTRL);
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}
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static inline void
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nlm_pic_write_control(uint64_t base, uint64_t control)
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{
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nlm_write_pic_reg(base, PIC_CTRL, control);
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}
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static inline void
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nlm_pic_update_control(uint64_t base, uint64_t control)
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{
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uint64_t val;
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val = nlm_read_pic_reg(base, PIC_CTRL);
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nlm_write_pic_reg(base, PIC_CTRL, control | val);
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}
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static inline void
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nlm_set_irt_to_cpu(uint64_t base, int irt, int cpu)
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{
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uint64_t val;
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val = nlm_read_pic_reg(base, PIC_IRT(irt));
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val |= cpu & 0xf;
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if (cpu > 15)
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val |= 1 << 16;
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/* clear cpuset and mask */
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val &= ~((0x7ull << 16) | 0xffff);
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/* set DB, cpuset and cpumask */
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val |= (1 << 19) | ((cpu >> 4) << 16) | (1 << (cpu & 0xf));
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nlm_write_pic_reg(base, PIC_IRT(irt), val);
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}
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@ -369,7 +349,7 @@ nlm_pic_enable_irt(uint64_t base, int irt)
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static inline void
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nlm_pic_disable_irt(uint64_t base, int irt)
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{
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uint32_t reg;
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uint64_t reg;
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reg = nlm_read_pic_reg(base, PIC_IRT(irt));
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nlm_write_pic_reg(base, PIC_IRT(irt), reg & ~((uint64_t)1 << 31));
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@ -379,15 +359,9 @@ static inline void
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nlm_pic_send_ipi(uint64_t base, int hwt, int irq, int nmi)
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{
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uint64_t ipi;
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int node, ncpu;
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node = hwt / 32;
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ncpu = hwt & 0x1f;
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ipi = ((uint64_t)nmi << 31) | (irq << 20) | (node << 17) |
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(1 << (ncpu & 0xf));
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if (ncpu > 15)
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ipi |= 0x10000; /* Setting bit 16 to select cpus 16-31 */
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ipi = (nmi << 31) | (irq << 20);
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ipi |= ((hwt >> 4) << 16) | (1 << (hwt & 0xf)); /* cpuset and mask */
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nlm_write_pic_reg(base, PIC_IPI_CTL, ipi);
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}
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