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drm/omap: Get from CRTC to display device directly

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The CRTC mode set implementation needs to access the omap_dss_device for
the pipeline display. To do so, it iterates over all pipelines to find
the one that contains an encoder corresponding to the CRTC, and request
the display device from the encoder. That's a very complicated dance
when the CRTC has a direct pipeline pointer already, and the pipeline
contains a pointer to the display device.

Replace the convoluted code with direct access.

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
This commit is contained in:
Laurent Pinchart 2018-05-31 23:04:30 +03:00 committed by Tomi Valkeinen
parent 90279e9518
commit 70f9cbfc56
3 changed files with 4 additions and 31 deletions
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25
drivers/gpu/drm/omapdrm/omap_crtc.c
View File

@ -419,12 +419,12 @@ static enum drm_mode_status omap_crtc_mode_valid(struct drm_crtc *crtc,
static void omap_crtc_mode_set_nofb(struct drm_crtc *crtc)
{
struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
struct omap_dss_device *display = omap_crtc->pipe->display;
struct drm_display_mode *mode = &crtc->state->adjusted_mode;
struct omap_drm_private *priv = crtc->dev->dev_private;
const u32 flags_mask = DISPLAY_FLAGS_DE_HIGH | DISPLAY_FLAGS_DE_LOW |
DISPLAY_FLAGS_PIXDATA_POSEDGE | DISPLAY_FLAGS_PIXDATA_NEGEDGE |
DISPLAY_FLAGS_SYNC_POSEDGE | DISPLAY_FLAGS_SYNC_NEGEDGE;
unsigned int i;
struct videomode vm = {0};
DBG("%s: set mode: %d:\"%s\" %d %d %d %d %d %d %d %d %d %d 0x%x 0x%x",
omap_crtc->name, mode->base.id, mode->name,
@ -447,25 +447,8 @@ static void omap_crtc_mode_set_nofb(struct drm_crtc *crtc)
* has been changed to the DRM model.
*/
for (i = 0; i < priv->num_pipes; ++i) {
struct drm_encoder *encoder = priv->pipes[i].encoder;
if (encoder->crtc == crtc) {
struct omap_dss_device *dssdev;
dssdev = omap_encoder_get_dssdev(encoder);
if (dssdev) {
struct videomode vm = {0};
dssdev->ops->get_timings(dssdev, &vm);
omap_crtc->vm.flags |= vm.flags & flags_mask;
}
break;
}
}
display->ops->get_timings(display, &vm);
omap_crtc->vm.flags |= vm.flags & flags_mask;
}
static int omap_crtc_atomic_check(struct drm_crtc *crtc,

7
drivers/gpu/drm/omapdrm/omap_encoder.c
View File

@ -39,13 +39,6 @@ struct omap_encoder {
struct omap_dss_device *dssdev;
};
struct omap_dss_device *omap_encoder_get_dssdev(struct drm_encoder *encoder)
{
struct omap_encoder *omap_encoder = to_omap_encoder(encoder);
return omap_encoder->dssdev;
}
static void omap_encoder_destroy(struct drm_encoder *encoder)
{
struct omap_encoder *omap_encoder = to_omap_encoder(encoder);

3
drivers/gpu/drm/omapdrm/omap_encoder.h
View File

@ -27,7 +27,4 @@ struct omap_dss_device;
struct drm_encoder *omap_encoder_init(struct drm_device *dev,
struct omap_dss_device *dssdev);
/* map crtc to vblank mask */
struct omap_dss_device *omap_encoder_get_dssdev(struct drm_encoder *encoder);
#endif /* __OMAPDRM_ENCODER_H__ */