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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-25 06:40:53 +07:00
[I2C] Clean up i2c-pxa debugging/printks
Fix up comments made by review by gregkh. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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b652b438fc
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@ -60,17 +60,6 @@ struct pxa_i2c {
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*/
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#define I2C_PXA_SLAVE_ADDR 0x1
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/*
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* Set this to zero to remove all debug statements via dead code elimination.
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*/
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#undef DEBUG
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#if 0
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#define DBGLVL KERN_INFO
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#else
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#define DBGLVL KERN_DEBUG
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#endif
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#ifdef DEBUG
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struct bits {
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@ -108,7 +97,7 @@ static const struct bits isr_bits[] = {
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static void decode_ISR(unsigned int val)
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{
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decode_bits(DBGLVL "ISR", isr_bits, ARRAY_SIZE(isr_bits), val);
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decode_bits(KERN_DEBUG "ISR", isr_bits, ARRAY_SIZE(isr_bits), val);
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printk("\n");
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}
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@ -132,7 +121,7 @@ static const struct bits icr_bits[] = {
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static void decode_ICR(unsigned int val)
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{
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decode_bits(DBGLVL "ICR", icr_bits, ARRAY_SIZE(icr_bits), val);
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decode_bits(KERN_DEBUG "ICR", icr_bits, ARRAY_SIZE(icr_bits), val);
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printk("\n");
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}
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@ -140,7 +129,7 @@ static unsigned int i2c_debug = DEBUG;
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static void i2c_pxa_show_state(struct pxa_i2c *i2c, int lno, const char *fname)
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{
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printk(DBGLVL "state:%s:%d: ISR=%08x, ICR=%08x, IBMR=%02x\n", fname, lno, ISR, ICR, IBMR);
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dev_dbg(&i2c->adap.dev, "state:%s:%d: ISR=%08x, ICR=%08x, IBMR=%02x\n", fname, lno, ISR, ICR, IBMR);
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}
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#define show_state(i2c) i2c_pxa_show_state(i2c, __LINE__, __FUNCTION__)
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@ -152,7 +141,7 @@ static void i2c_pxa_show_state(struct pxa_i2c *i2c, int lno, const char *fname)
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#define decode_ICR(val) do { } while (0)
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#endif
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#define eedbg(lvl, x...) do { if ((lvl) < 1) { printk(DBGLVL "" x); } } while(0)
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#define eedbg(lvl, x...) do { if ((lvl) < 1) { printk(KERN_DEBUG "" x); } } while(0)
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static void i2c_pxa_master_complete(struct pxa_i2c *i2c, int ret);
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@ -162,7 +151,8 @@ static void i2c_pxa_scream_blue_murder(struct pxa_i2c *i2c, const char *why)
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printk("i2c: error: %s\n", why);
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printk("i2c: msg_num: %d msg_idx: %d msg_ptr: %d\n",
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i2c->msg_num, i2c->msg_idx, i2c->msg_ptr);
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printk("i2c: ICR: %08x ISR: %08x\ni2c: log: ", ICR, ISR);
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printk("i2c: ICR: %08x ISR: %08x\n"
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"i2c: log: ", ICR, ISR);
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for (i = 0; i < i2c->irqlogidx; i++)
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printk("[%08x:%08x] ", i2c->isrlog[i], i2c->icrlog[i]);
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printk("\n");
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@ -178,7 +168,7 @@ static void i2c_pxa_abort(struct pxa_i2c *i2c)
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unsigned long timeout = jiffies + HZ/4;
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if (i2c_pxa_is_slavemode(i2c)) {
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printk(DBGLVL "i2c_pxa_transfer: called in slave mode\n");
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dev_dbg(&i2c->adap.dev, "%s: called in slave mode\n", __func__);
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return;
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}
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@ -222,12 +212,12 @@ static int i2c_pxa_wait_master(struct pxa_i2c *i2c)
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while (time_before(jiffies, timeout)) {
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if (i2c_debug > 1)
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printk(DBGLVL "i2c_pxa_wait_master: %ld: ISR=%08x, ICR=%08x, IBMR=%02x\n",
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(long)jiffies, ISR, ICR, IBMR);
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dev_dbg(&i2c->adap.dev, "%s: %ld: ISR=%08x, ICR=%08x, IBMR=%02x\n",
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__func__, (long)jiffies, ISR, ICR, IBMR);
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if (ISR & ISR_SAD) {
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if (i2c_debug > 0)
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printk(DBGLVL "i2c_pxa_wait_master: Slave detected\n");
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dev_dbg(&i2c->adap.dev, "%s: Slave detected\n", __func__);
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goto out;
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}
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@ -237,7 +227,7 @@ static int i2c_pxa_wait_master(struct pxa_i2c *i2c)
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*/
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if ((ISR & (ISR_UB | ISR_IBB)) == 0 && IBMR == 3) {
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if (i2c_debug > 0)
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printk(DBGLVL "i2c_pxa_wait_master: done\n");
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dev_dbg(&i2c->adap.dev, "%s: done\n", __func__);
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return 1;
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}
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@ -245,7 +235,7 @@ static int i2c_pxa_wait_master(struct pxa_i2c *i2c)
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}
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if (i2c_debug > 0)
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printk(DBGLVL "i2c_pxa_wait_master: did not free\n");
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dev_dbg(&i2c->adap.dev, "%s: did not free\n", __func__);
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out:
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return 0;
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}
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@ -253,12 +243,12 @@ static int i2c_pxa_wait_master(struct pxa_i2c *i2c)
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static int i2c_pxa_set_master(struct pxa_i2c *i2c)
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{
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if (i2c_debug)
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printk(DBGLVL "I2C: setting to bus master\n");
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dev_dbg(&i2c->adap.dev, "setting to bus master\n");
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if ((ISR & (ISR_UB | ISR_IBB)) != 0) {
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printk(DBGLVL "set_master: unit is busy\n");
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dev_dbg(&i2c->adap.dev, "%s: unit is busy\n", __func__);
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if (!i2c_pxa_wait_master(i2c)) {
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printk(DBGLVL "set_master: error: unit busy\n");
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dev_dbg(&i2c->adap.dev, "%s: error: unit busy\n", __func__);
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return I2C_RETRY;
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}
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}
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@ -278,13 +268,13 @@ static int i2c_pxa_wait_slave(struct pxa_i2c *i2c)
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while (time_before(jiffies, timeout)) {
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if (i2c_debug > 1)
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printk(DBGLVL "i2c_pxa_wait_slave: %ld: ISR=%08x, ICR=%08x, IBMR=%02x\n",
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(long)jiffies, ISR, ICR, IBMR);
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dev_dbg(&i2c->adap.dev, "%s: %ld: ISR=%08x, ICR=%08x, IBMR=%02x\n",
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__func__, (long)jiffies, ISR, ICR, IBMR);
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if ((ISR & (ISR_UB|ISR_IBB|ISR_SAD)) == ISR_SAD ||
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(ICR & ICR_SCLE) == 0) {
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if (i2c_debug > 1)
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printk(DBGLVL "i2c_pxa_wait_slave: done\n");
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dev_dbg(&i2c->adap.dev, "%s: done\n", __func__);
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return 1;
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}
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@ -292,7 +282,7 @@ static int i2c_pxa_wait_slave(struct pxa_i2c *i2c)
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}
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if (i2c_debug > 0)
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printk(DBGLVL "i2c_pxa_wait_slave: did not free\n");
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dev_dbg(&i2c->adap.dev, "%s: did not free\n", __func__);
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return 0;
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}
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@ -316,7 +306,8 @@ static void i2c_pxa_set_slave(struct pxa_i2c *i2c, int errcode)
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}
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if (!i2c_pxa_wait_slave(i2c)) {
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printk(KERN_ERR "i2c_pxa_set_slave: wait timedout\n");
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dev_err(&i2c->adap.dev, "%s: wait timedout\n",
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__func__);
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return;
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}
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}
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@ -325,7 +316,7 @@ static void i2c_pxa_set_slave(struct pxa_i2c *i2c, int errcode)
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ICR &= ~ICR_SCLE;
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if (i2c_debug) {
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printk(DBGLVL "ICR now %08x, ISR %08x\n", ICR, ISR);
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dev_dbg(&i2c->adap.dev, "ICR now %08x, ISR %08x\n", ICR, ISR);
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decode_ICR(ICR);
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}
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}
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@ -351,7 +342,7 @@ static void i2c_pxa_reset(struct pxa_i2c *i2c)
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ICR = I2C_ICR_INIT;
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#ifdef CONFIG_I2C_PXA_SLAVE
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printk(KERN_INFO "I2C: Enabling slave mode\n");
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dev_info(&i2c->adap.dev, "Enabling slave mode\n");
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ICR |= ICR_SADIE | ICR_ALDIE | ICR_SSDIE;
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#endif
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@ -522,7 +513,7 @@ static void i2c_pxa_slave_start(struct pxa_i2c *i2c, u32 isr)
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int timeout;
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if (i2c_debug > 0)
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printk(DBGLVL "I2C: SAD, mode is slave-%cx\n",
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dev_dbg(&i2c->adap.dev, "SAD, mode is slave-%cx\n",
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(isr & ISR_RWM) ? 'r' : 't');
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if (i2c->slave != NULL)
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@ -546,7 +537,7 @@ static void i2c_pxa_slave_start(struct pxa_i2c *i2c, u32 isr)
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timeout--;
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if (timeout <= 0) {
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printk(KERN_ERR "timeout waiting for SCL high\n");
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dev_err(&i2c->adap.dev, "timeout waiting for SCL high\n");
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break;
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}
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}
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@ -557,13 +548,13 @@ static void i2c_pxa_slave_start(struct pxa_i2c *i2c, u32 isr)
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static void i2c_pxa_slave_stop(struct pxa_i2c *i2c)
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{
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if (i2c_debug > 2)
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printk(DBGLVL "ISR: SSD (Slave Stop)\n");
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dev_dbg(&i2c->adap.dev, "ISR: SSD (Slave Stop)\n");
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if (i2c->slave != NULL)
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i2c->slave->event(i2c->slave->data, I2C_SLAVE_EVENT_STOP);
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if (i2c_debug > 2)
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printk(DBGLVL "ISR: SSD (Slave Stop) acked\n");
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dev_dbg(&i2c->adap.dev, "ISR: SSD (Slave Stop) acked\n");
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/*
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* If we have a master-mode message waiting,
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@ -609,7 +600,7 @@ static void i2c_pxa_slave_start(struct pxa_i2c *i2c, u32 isr)
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timeout--;
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if (timeout <= 0) {
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printk(KERN_ERR "timeout waiting for SCL high\n");
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dev_err(&i2c->adap.dev, "timeout waiting for SCL high\n");
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break;
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}
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}
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@ -667,7 +658,7 @@ static int i2c_pxa_do_xfer(struct pxa_i2c *i2c, struct i2c_msg *msg, int num)
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*/
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ret = i2c_pxa_wait_bus_not_busy(i2c);
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if (ret) {
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printk(KERN_INFO "i2c_pxa: timeout waiting for bus free\n");
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dev_err(&i2c->adap.dev, "i2c_pxa: timeout waiting for bus free\n");
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goto out;
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}
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@ -676,7 +667,7 @@ static int i2c_pxa_do_xfer(struct pxa_i2c *i2c, struct i2c_msg *msg, int num)
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*/
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ret = i2c_pxa_set_master(i2c);
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if (ret) {
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printk(KERN_INFO "i2c_pxa_set_master: error %d\n", ret);
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dev_err(&i2c->adap.dev, "i2c_pxa_set_master: error %d\n", ret);
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goto out;
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}
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@ -864,8 +855,8 @@ static irqreturn_t i2c_pxa_handler(int this_irq, void *dev_id, struct pt_regs *r
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u32 isr = ISR;
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if (i2c_debug > 2 && 0) {
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printk(DBGLVL "i2c_pxa_handler: ISR=%08x, ICR=%08x, IBMR=%02x\n",
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isr, ICR, IBMR);
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dev_dbg(&i2c->adap.dev, "%s: ISR=%08x, ICR=%08x, IBMR=%02x\n",
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__func__, isr, ICR, IBMR);
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decode_ISR(isr);
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}
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@ -913,7 +904,7 @@ static int i2c_pxa_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num
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goto out;
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if (i2c_debug)
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printk(KERN_INFO "Retrying transmission\n");
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dev_dbg(&adap->dev, "Retrying transmission\n");
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udelay(100);
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}
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i2c_pxa_scream_blue_murder(i2c, "exhausted retries");
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