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ARM: dts: clean up arm-pmu node for exynos4

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This patch cleans a arm-pmu node up for exynos4. Only exynos4412 series
boards have four pmu interrupts. Rest of exynos4 boards, except 4412, have only
two pmu interrupts. Thus, we can define two interrupts in the
exynos4.dtsi and extends the interrupts only exynos4412.dtsi.

Cc: Chanwoo Choi <cw00.choi@samsung.com>
Cc: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Tested-by: Tushar Behera <tushar.behera@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This commit is contained in:
Chanho Park 2014-07-19 03:11:48 +09:00 committed by Kukjin Kim
parent d51cad7df8
commit 6f4b82a356
4 changed files with 10 additions and 12 deletions
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6
arch/arm/boot/dts/exynos4.dtsi
View File

@ -123,6 +123,12 @@ combiner: interrupt-controller@10440000 {
reg = <0x10440000 0x1000>; reg = <0x10440000 0x1000>;
}; };
pmu {
compatible = "arm,cortex-a9-pmu";
interrupt-parent = <&combiner>;
interrupts = <2 2>, <3 2>;
};
sys_reg: syscon@10010000 { sys_reg: syscon@10010000 {
compatible = "samsung,exynos4-sysreg", "syscon"; compatible = "samsung,exynos4-sysreg", "syscon";
reg = <0x10010000 0x400>; reg = <0x10010000 0x400>;

6
arch/arm/boot/dts/exynos4210.dtsi
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@ -93,12 +93,6 @@ clock: clock-controller@10030000 {
#clock-cells = <1>; #clock-cells = <1>;
}; };
pmu {
compatible = "arm,cortex-a9-pmu";
interrupt-parent = <&combiner>;
interrupts = <2 2>, <3 2>;
};
pinctrl_0: pinctrl@11400000 { pinctrl_0: pinctrl@11400000 {
compatible = "samsung,exynos4210-pinctrl"; compatible = "samsung,exynos4210-pinctrl";
reg = <0x11400000 0x1000>; reg = <0x11400000 0x1000>;

4
arch/arm/boot/dts/exynos4412.dtsi
View File

@ -26,6 +26,10 @@ combiner: interrupt-controller@10440000 {
samsung,combiner-nr = <20>; samsung,combiner-nr = <20>;
}; };
pmu {
interrupts = <2 2>, <3 2>, <18 2>, <19 2>;
};
gic: interrupt-controller@10490000 { gic: interrupt-controller@10490000 {
cpu-offset = <0x4000>; cpu-offset = <0x4000>;
}; };

6
arch/arm/boot/dts/exynos4x12.dtsi
View File

@ -31,12 +31,6 @@ aliases {
mshc0 = &mshc_0; mshc0 = &mshc_0;
}; };
pmu {
compatible = "arm,cortex-a9-pmu";
interrupt-parent = <&combiner>;
interrupts = <2 2>, <3 2>, <18 2>, <19 2>;
};
sysram@02020000 { sysram@02020000 {
compatible = "mmio-sram"; compatible = "mmio-sram";
reg = <0x02020000 0x40000>; reg = <0x02020000 0x40000>;