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drm/amdgpu: count fences from all uvd instances in idle handler
Current multi-UVD hardware uses a single clock and power source so handle all instances in the idle handler. Reviewed-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -1146,7 +1146,11 @@ static void amdgpu_uvd_idle_work_handler(struct work_struct *work)
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{
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struct amdgpu_device *adev =
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container_of(work, struct amdgpu_device, uvd.inst->idle_work.work);
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unsigned fences = amdgpu_fence_count_emitted(&adev->uvd.inst->ring);
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unsigned fences = 0, i;
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for (i = 0; i < adev->uvd.num_uvd_inst; ++i) {
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fences += amdgpu_fence_count_emitted(&adev->uvd.inst[i].ring);
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}
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if (fences == 0) {
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if (adev->pm.dpm_enabled) {
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