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ARM: 7617/1: mmc: mmci: Support for DDR mode
Add support for DDR mode which may be used for the ux500v2 variant. Corresponding capabilities to enable the DDR support must be set in the platform struct to enable the functionality. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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@ -202,6 +202,9 @@ static void mmci_set_clkreg(struct mmci_host *host, unsigned int desired)
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if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_8)
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clk |= MCI_ST_8BIT_BUS;
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if (host->mmc->ios.timing == MMC_TIMING_UHS_DDR50)
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clk |= MCI_ST_UX500_NEG_EDGE;
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mmci_write_clkreg(host, clk);
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}
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@ -680,6 +683,9 @@ static void mmci_start_data(struct mmci_host *host, struct mmc_data *data)
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mmci_write_clkreg(host, clk);
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}
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if (host->mmc->ios.timing == MMC_TIMING_UHS_DDR50)
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datactrl |= MCI_ST_DPSM_DDRMODE;
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/*
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* Attempt to use DMA operation mode, if this
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* should fail, fall back to PIO mode
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