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omap3isp: Set cam_mclk rate directly
Now that the cam_mclk rate changes are back-propagated to dpll4_m5_ck we can set the cam_mclk rate directly instead of manually setting the rate of the parent clock. Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Reviewed-by: Mike Turquette <mturquette@linaro.org> Acked-by: Sakari Ailus <sakari.ailus@iki.fi> Tested-by: Sakari Ailus <sakari.ailus@iki.fi>
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@ -1338,28 +1338,15 @@ static int isp_enable_clocks(struct isp_device *isp)
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{
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int r;
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unsigned long rate;
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int divisor;
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/*
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* cam_mclk clock chain:
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* dpll4 -> dpll4_m5 -> dpll4_m5x2 -> cam_mclk
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*
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* In OMAP3630 dpll4_m5x2 != 2 x dpll4_m5 but both are
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* set to the same value. Hence the rate set for dpll4_m5
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* has to be twice of what is set on OMAP3430 to get
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* the required value for cam_mclk
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*/
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divisor = isp->revision == ISP_REVISION_15_0 ? 1 : 2;
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r = clk_prepare_enable(isp->clock[ISP_CLK_CAM_ICK]);
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if (r) {
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dev_err(isp->dev, "failed to enable cam_ick clock\n");
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goto out_clk_enable_ick;
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}
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r = clk_set_rate(isp->clock[ISP_CLK_DPLL4_M5_CK],
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CM_CAM_MCLK_HZ/divisor);
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r = clk_set_rate(isp->clock[ISP_CLK_CAM_MCLK], CM_CAM_MCLK_HZ);
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if (r) {
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dev_err(isp->dev, "clk_set_rate for dpll4_m5_ck failed\n");
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dev_err(isp->dev, "clk_set_rate for cam_mclk failed\n");
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goto out_clk_enable_mclk;
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}
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r = clk_prepare_enable(isp->clock[ISP_CLK_CAM_MCLK]);
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@ -1401,7 +1388,6 @@ static void isp_disable_clocks(struct isp_device *isp)
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static const char *isp_clocks[] = {
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"cam_ick",
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"cam_mclk",
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"dpll4_m5_ck",
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"csi2_96m_fck",
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"l3_ick",
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};
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@ -147,7 +147,6 @@ struct isp_platform_callback {
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* @ref_count: Reference count for handling multiple ISP requests.
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* @cam_ick: Pointer to camera interface clock structure.
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* @cam_mclk: Pointer to camera functional clock structure.
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* @dpll4_m5_ck: Pointer to DPLL4 M5 clock structure.
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* @csi2_fck: Pointer to camera CSI2 complexIO clock structure.
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* @l3_ick: Pointer to OMAP3 L3 bus interface clock.
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* @irq: Currently attached ISP ISR callbacks information structure.
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@ -189,10 +188,9 @@ struct isp_device {
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u32 xclk_divisor[2]; /* Two clocks, a and b. */
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#define ISP_CLK_CAM_ICK 0
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#define ISP_CLK_CAM_MCLK 1
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#define ISP_CLK_DPLL4_M5_CK 2
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#define ISP_CLK_CSI2_FCK 3
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#define ISP_CLK_L3_ICK 4
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struct clk *clock[5];
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#define ISP_CLK_CSI2_FCK 2
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#define ISP_CLK_L3_ICK 3
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struct clk *clock[4];
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/* ISP modules */
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struct ispstat isp_af;
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