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mvebu dt for 4.10 (part 1)

Browse Source 
Add missing pinmux declaration for netgear NASes
 Fix i2c compatible string for netgear NASes
 Fix on a wrong comment about PLL frequency
 Fix spelling mistake of the manufacturer's name of the Topkick
 Add dt support for the orion5x ls-chl Linkstation device
 First step of fixing DTC warning for Armada 370, 375 and XP
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Merge tag 'mvebu-dt-4.10-1' of git://git.infradead.org/linux-mvebu into next/dt

Pull "mvebu dt for 4.10 (part 1)" from Gregory CLEMENT:

Add missing pinmux declaration for netgear NASes
Fix i2c compatible string for netgear NASes
Fix on a wrong comment about PLL frequency
Fix spelling mistake of the manufacturer's name of the Topkick
Add dt support for the orion5x ls-chl Linkstation device
First step of fixing DTC warning for Armada 370, 375 and XP

* tag 'mvebu-dt-4.10-1' of git://git.infradead.org/linux-mvebu: (30 commits)
  ARM: dts: armada-375: Fixup ethernet child DT warning
  ARM: dts: armada-375: Fixup memory DT warning
  ARM: dts: armada-375: Remove skeleton.dtsi
  ARM: dts: armada-375: Fixup pinctrl DT warnings
  ARM: dts: armada-375: Fixup pcie DT warnings
  ARM: dts: armada-375: Fixup mdio DT warning
  ARM: dts: armada-375: Use the node labels
  ARM: dts: armada-375: Add node labels
  ARM: dts: armada-370-xp: Fixup regulator DT warning
  ARM: dts: armada-370-xp: Remove button address and fixup names
  ARM: dts: armada-370-xp: Remove address from dsa unit name
  ARM: dts: armada-370-xp: Fixup memory DT warning
  ARM: dts: armada-370-xp: Fixup l2-cache DT warning
  ARM: dts: armada-370-xp: Remove skeleton.dtsi
  ARM: dts: armada-370: Fixup pcie DT warnings
  ARM: dts: armada-xp: Fixup pcie DT warnings
  ARM: dts: armada-370-xp: Fixup mdio DT warning
  ARM: dts: armada-370-xp: Use the node labels
  ARM: dts: armada-370-xp: add node labels
  ARM: dts: armada-370-xp: move the cpurst node in the common file
  ...
This commit is contained in:
Arnd Bergmann 2016-11-26 00:45:02 +01:00
commit 6c3026980e
32 changed files with 1042 additions and 845 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
arch/arm/boot/dts/Makefile
View File

@ -609,6 +609,7 @@ dtb-$(CONFIG_ARCH_ORION5X) += \
orion5x-lacie-ethernet-disk-mini-v2.dtb \
orion5x-linkstation-lsgl.dtb \
orion5x-linkstation-lswtgl.dtb \
orion5x-lschl.dtb \
orion5x-lswsgl.dtb \
orion5x-maxtor-shared-storage-2.dtb \
orion5x-netgear-wnr854t.dtb \

63
arch/arm/boot/dts/armada-370-db.dts
View File

@ -67,7 +67,7 @@ chosen {
stdout-path = "serial0:115200n8";
};
memory {
memory@0 {
device_type = "memory";
reg = <0x00000000 0x40000000>; /* 1 GB */
};
@ -86,18 +86,6 @@ sata@a0000 {
status = "okay";
};
mdio {
pinctrl-0 = <&mdio_pins>;
pinctrl-names = "default";
phy0: ethernet-phy@0 {
reg = <0>;
};
phy1: ethernet-phy@1 {
reg = <1>;
};
};
ethernet@70000 {
pinctrl-0 = <&ge0_rgmii_pins>;
pinctrl-names = "default";
@ -182,24 +170,6 @@ partition@1000000 {
};
};
};
pcie-controller {
status = "okay";
/*
* The two PCIe units are accessible through
* both standard PCIe slots and mini-PCIe
* slots on the board.
*/
pcie@1,0 {
/* Port 0, Lane 0 */
status = "okay";
};
pcie@2,0 {
/* Port 1, Lane 0 */
status = "okay";
};
};
};
sound {
@ -261,6 +231,37 @@ spdif_in: spdif-in {
};
};
&pciec {
status = "okay";
/*
* The two PCIe units are accessible through
* both standard PCIe slots and mini-PCIe
* slots on the board.
*/
pcie@1,0 {
/* Port 0, Lane 0 */
status = "okay";
};
pcie@2,0 {
/* Port 1, Lane 0 */
status = "okay";
};
};
&mdio {
pinctrl-0 = <&mdio_pins>;
pinctrl-names = "default";
phy0: ethernet-phy@0 {
reg = <0>;
};
phy1: ethernet-phy@1 {
reg = <1>;
};
};
&spi0 {
pinctrl-0 = <&spi0_pins2>;
pinctrl-names = "default";

30
arch/arm/boot/dts/armada-370-dlink-dns327l.dts
View File

@ -62,7 +62,7 @@ chosen {
stdout-path = &uart0;
};
memory {
memory@0 {
device_type = "memory";
reg = <0x00000000 0x20000000>; /* 512 MiB */
};
@ -72,20 +72,6 @@ soc {
MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000
MBUS_ID(0x09, 0x01) 0 0xf1100000 0x10000>;
pcie-controller {
status = "okay";
pcie@1,0 {
/* Port 0, Lane 0 */
status = "okay";
};
pcie@2,0 {
/* Port 1, Lane 0 */
status = "okay";
};
};
internal-regs {
sata@a0000 {
nr-ports = <2>;
@ -262,6 +248,20 @@ sata_l_power: regulator@3 {
};
};
&pciec {
status = "okay";
pcie@1,0 {
/* Port 0, Lane 0 */
status = "okay";
};
pcie@2,0 {
/* Port 1, Lane 0 */
status = "okay";
};
};
&pinctrl {
sata_l_white_pin: sata-l-white-pin {
marvell,pins = "mpp57";

57
arch/arm/boot/dts/armada-370-mirabox.dts
View File

@ -54,7 +54,7 @@ chosen {
stdout-path = "serial0:115200n8";
};
memory {
memory@0 {
device_type = "memory";
reg = <0x00000000 0x20000000>; /* 512 MB */
};
@ -64,22 +64,6 @@ soc {
MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000
MBUS_ID(0x09, 0x01) 0 0xf1100000 0x10000>;
pcie-controller {
status = "okay";
/* Internal mini-PCIe connector */
pcie@1,0 {
/* Port 0, Lane 0 */
status = "okay";
};
/* Connected on the PCB to a USB 3.0 XHCI controller */
pcie@2,0 {
/* Port 1, Lane 0 */
status = "okay";
};
};
internal-regs {
serial@12000 {
status = "okay";
@ -113,17 +97,6 @@ green_stat_led {
};
};
mdio {
pinctrl-0 = <&mdio_pins>;
pinctrl-names = "default";
phy0: ethernet-phy@0 {
reg = <0>;
};
phy1: ethernet-phy@1 {
reg = <1>;
};
};
ethernet@70000 {
pinctrl-0 = <&ge0_rgmii_pins>;
pinctrl-names = "default";
@ -197,6 +170,34 @@ partition@800000 {
};
};
&pciec {
status = "okay";
/* Internal mini-PCIe connector */
pcie@1,0 {
/* Port 0, Lane 0 */
status = "okay";
};
/* Connected on the PCB to a USB 3.0 XHCI controller */
pcie@2,0 {
/* Port 1, Lane 0 */
status = "okay";
};
};
&mdio {
pinctrl-0 = <&mdio_pins>;
pinctrl-names = "default";
phy0: ethernet-phy@0 {
reg = <0>;
};
phy1: ethernet-phy@1 {
reg = <1>;
};
};
&pinctrl {
pwr_led_pin: pwr-led-pin {
marvell,pins = "mpp63";

55
arch/arm/boot/dts/armada-370-netgear-rn102.dts
View File

@ -56,7 +56,7 @@ chosen {
stdout-path = "serial0:115200n8";
};
memory {
memory@0 {
device_type = "memory";
reg = <0x00000000 0x20000000>; /* 512 MB */
};
@ -66,22 +66,6 @@ soc {
MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000
MBUS_ID(0x09, 0x01) 0 0xf1100000 0x10000>;
pcie-controller {
status = "okay";
/* Connected to Marvell 88SE9170 SATA controller */
pcie@1,0 {
/* Port 0, Lane 0 */
status = "okay";
};
/* Connected to FL1009 USB 3.0 controller */
pcie@2,0 {
/* Port 1, Lane 0 */
status = "okay";
};
};
internal-regs {
/* RTC is provided by Intersil ISL12057 I2C RTC chip */
@ -99,14 +83,6 @@ sata@a0000 {
status = "okay";
};
mdio {
pinctrl-0 = <&mdio_pins>;
pinctrl-names = "default";
phy0: ethernet-phy@0 { /* Marvell 88E1318 */
reg = <0>;
};
};
ethernet@74000 {
pinctrl-0 = <&ge1_rgmii_pins>;
pinctrl-names = "default";
@ -120,8 +96,11 @@ usb@50000 {
};
i2c@11000 {
compatible = "marvell,mv64xxx-i2c";
clock-frequency = <100000>;
pinctrl-0 = <&i2c0_pins>;
pinctrl-names = "default";
status = "okay";
isl12057: isl12057@68 {
@ -257,6 +236,30 @@ gpio-poweroff {
};
};
&pciec {
status = "okay";
/* Connected to Marvell 88SE9170 SATA controller */
pcie@1,0 {
/* Port 0, Lane 0 */
status = "okay";
};
/* Connected to FL1009 USB 3.0 controller */
pcie@2,0 {
/* Port 1, Lane 0 */
status = "okay";
};
};
&mdio {
pinctrl-0 = <&mdio_pins>;
pinctrl-names = "default";
phy0: ethernet-phy@0 { /* Marvell 88E1318 */
reg = <0>;
};
};
&pinctrl {
power_led_pin: power-led-pin {
marvell,pins = "mpp57";

63
arch/arm/boot/dts/armada-370-netgear-rn104.dts
View File

@ -56,7 +56,7 @@ chosen {
stdout-path = "serial0:115200n8";
};
memory {
memory@0 {
device_type = "memory";
reg = <0x00000000 0x20000000>; /* 512 MB */
};
@ -66,22 +66,6 @@ soc {
MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000
MBUS_ID(0x09, 0x01) 0 0xf1100000 0x10000>;
pcie-controller {
status = "okay";
/* Connected to FL1009 USB 3.0 controller */
pcie@1,0 {
/* Port 0, Lane 0 */
status = "okay";
};
/* Connected to Marvell 88SE9215 SATA controller */
pcie@2,0 {
/* Port 1, Lane 0 */
status = "okay";
};
};
internal-regs {
/* RTC is provided by Intersil ISL12057 I2C RTC chip */
@ -93,18 +77,6 @@ serial@12000 {
status = "okay";
};
mdio {
pinctrl-0 = <&mdio_pins>;
pinctrl-names = "default";
phy0: ethernet-phy@0 { /* Marvell 88E1318 */
reg = <0>;
};
phy1: ethernet-phy@1 { /* Marvell 88E1318 */
reg = <1>;
};
};
ethernet@70000 {
pinctrl-0 = <&ge0_rgmii_pins>;
pinctrl-names = "default";
@ -126,8 +98,11 @@ usb@50000 {
};
i2c@11000 {
compatible = "marvell,mv64xxx-i2c";
clock-frequency = <100000>;
pinctrl-0 = <&i2c0_pins>;
pinctrl-names = "default";
status = "okay";
isl12057: isl12057@68 {
@ -279,6 +254,34 @@ gpio-poweroff {
};
};
&pciec {
status = "okay";
/* Connected to FL1009 USB 3.0 controller */
pcie@1,0 {
/* Port 0, Lane 0 */
status = "okay";
};
/* Connected to Marvell 88SE9215 SATA controller */
pcie@2,0 {
/* Port 1, Lane 0 */
status = "okay";
};
};
&mdio {
pinctrl-0 = <&mdio_pins>;
pinctrl-names = "default";
phy0: ethernet-phy@0 { /* Marvell 88E1318 */
reg = <0>;
};
phy1: ethernet-phy@1 { /* Marvell 88E1318 */
reg = <1>;
};
};
&pinctrl {
poweroff: poweroff {
marvell,pins = "mpp60";

57
arch/arm/boot/dts/armada-370-rd.dts
View File

@ -67,7 +67,7 @@ chosen {
stdout-path = "serial0:115200n8";
};
memory {
memory@0 {
device_type = "memory";
reg = <0x00000000 0x20000000>; /* 512 MB */
};
@ -77,22 +77,6 @@ soc {
MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000
MBUS_ID(0x09, 0x01) 0 0xf1100000 0x10000>;
pcie-controller {
status = "okay";
/* Internal mini-PCIe connector */
pcie@1,0 {
/* Port 0, Lane 0 */
status = "okay";
};
/* Internal mini-PCIe connector */
pcie@2,0 {
/* Port 1, Lane 0 */
status = "okay";
};
};
internal-regs {
serial@12000 {
status = "okay";
@ -102,14 +86,6 @@ sata@a0000 {
status = "okay";
};
mdio {
pinctrl-0 = <&mdio_pins>;
pinctrl-names = "default";
phy0: ethernet-phy@0 {
reg = <0>;
};
};
ethernet@70000 {
status = "okay";
phy = <&phy0>;
@ -146,7 +122,7 @@ gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
button@1 {
button {
label = "Software Button";
linux,code = <KEY_POWER>;
gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
@ -196,7 +172,7 @@ partition@1000000 {
};
};
dsa@0 {
dsa {
compatible = "marvell,dsa";
#address-cells = <2>;
#size-cells = <0>;
@ -235,7 +211,32 @@ port@5 {
};
};
};
};
};
&pciec {
status = "okay";
/* Internal mini-PCIe connector */
pcie@1,0 {
/* Port 0, Lane 0 */
status = "okay";
};
/* Internal mini-PCIe connector */
pcie@2,0 {
/* Port 1, Lane 0 */
status = "okay";
};
};
&mdio {
pinctrl-0 = <&mdio_pins>;
pinctrl-names = "default";
phy0: ethernet-phy@0 {
reg = <0>;
};
};
&pinctrl {
fan_pins: fan-pins {

27
arch/arm/boot/dts/armada-370-seagate-nas-4bay.dts
View File

@ -28,20 +28,7 @@ / {
compatible = "seagate,dart-4", "marvell,armada370", "marvell,armada-370-xp";
soc {
pcie-controller {
/* SATA AHCI controller 88SE9170 */
pcie@1,0 {
status = "okay";
};
};
internal-regs {
mdio {
phy1: ethernet-phy@1 {
reg = <1>;
};
};
ethernet@74000 {
status = "okay";
pinctrl-0 = <&ge1_rgmii_pins>;
@ -131,3 +118,17 @@ gpio-fan {
1300 0>;
};
};
&pciec {
/* SATA AHCI controller 88SE9170 */
pcie@1,0 {
status = "okay";
};
};
&mdio {
phy1: ethernet-phy@1 {
reg = <1>;
};
};

45
arch/arm/boot/dts/armada-370-seagate-nas-xbay.dtsi
View File

@ -23,7 +23,7 @@ chosen {
stdout-path = "serial0:115200n8";
};
memory {
memory@0 {
device_type = "memory";
reg = <0x00000000 0x20000000>; /* 512 MB */
};
@ -32,15 +32,6 @@ soc {
ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000>;
pcie-controller {
status = "okay";
/* USB 3.0 bridge ASM1042A */
pcie@2,0 {
status = "okay";
};
};
internal-regs {
serial@12000 {
status = "okay";
@ -51,15 +42,6 @@ sata@a0000 {
status = "okay";
};
mdio {
pinctrl-0 = <&mdio_pins>;
pinctrl-names = "default";
phy0: ethernet-phy@0 {
reg = <0>;
};
};
ethernet@70000 {
status = "okay";
pinctrl-0 = <&ge0_rgmii_pins>;
@ -159,19 +141,19 @@ gpio-keys {
#address-cells = <1>;
#size-cells = <0>;
button@1 {
power {
label = "Power button";
linux,code = <KEY_POWER>;
gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
debounce-interval = <100>;
};
button@2 {
backup {
label = "Backup button";
linux,code = <KEY_OPTION>;
gpios = <&gpio0 31 GPIO_ACTIVE_LOW>;
debounce-interval = <100>;
};
button@3 {
reset {
label = "Reset Button";
linux,code = <KEY_RESTART>;
gpios = <&gpio1 23 GPIO_ACTIVE_LOW>;
@ -208,6 +190,25 @@ gpio_poweroff {
};
};
&pciec {
status = "okay";
/* USB 3.0 bridge ASM1042A */
pcie@2,0 {
status = "okay";
};
};
&mdio {
pinctrl-0 = <&mdio_pins>;
pinctrl-names = "default";
phy0: ethernet-phy@0 {
reg = <0>;
};
};
&pinctrl {
pinctrl-0 = <&hdd0_led_sata_pin>, <&hdd1_led_sata_pin>;
pinctrl-names = "default";

44
arch/arm/boot/dts/armada-370-seagate-personal-cloud.dtsi
View File

@ -24,7 +24,7 @@ chosen {
stdout-path = "serial0:115200n8";
};
memory {
memory@0 {
device_type = "memory";
reg = <0x00000000 0x20000000>; /* 512 MB */
};
@ -33,15 +33,6 @@ soc {
ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000>;
pcie-controller {
status = "okay";
/* USB 3.0 Bridge ASM1042A */
pcie@1,0 {
status = "okay";
};
};
internal-regs {
coherency-fabric@20200 {
broken-idle;
@ -51,15 +42,6 @@ serial@12000 {
status = "okay";
};
mdio {
pinctrl-0 = <&mdio_pins>;
pinctrl-names = "default";
phy0: ethernet-phy@0 {
reg = <0>;
};
};
ethernet@74000 {
status = "okay";
pinctrl-0 = <&ge1_rgmii_pins>;
@ -107,19 +89,19 @@ gpio-keys {
#address-cells = <1>;
#size-cells = <0>;
button@1 {
power {
label = "Power button";
linux,code = <KEY_POWER>;
gpios = <&gpio1 19 GPIO_ACTIVE_HIGH>;
debounce-interval = <100>;
};
button@2 {
reset {
label = "Reset Button";
linux,code = <KEY_RESTART>;
gpios = <&gpio1 23 GPIO_ACTIVE_LOW>;
debounce-interval = <100>;
};
button@3 {
button {
label = "USB VBUS error";
linux,code = <KEY_UNKNOWN>;
gpios = <&gpio1 21 GPIO_ACTIVE_LOW>;
@ -143,6 +125,24 @@ gpio_poweroff {
};
};
&pciec {
status = "okay";
/* USB 3.0 Bridge ASM1042A */
pcie@1,0 {
status = "okay";
};
};
&mdio {
pinctrl-0 = <&mdio_pins>;
pinctrl-names = "default";
phy0: ethernet-phy@0 {
reg = <0>;
};
};
&pinctrl {
pinctrl-0 = <&sata_led_pin>;
pinctrl-names = "default";

18
arch/arm/boot/dts/armada-370-synology-ds213j.dts
View File

@ -70,7 +70,7 @@ chosen {
stdout-path = "serial0:115200n8";
};
memory {
memory@0 {
device_type = "memory";
reg = <0x00000000 0x20000000>; /* 512 MB */
};
@ -127,12 +127,6 @@ usb@51000 {
status = "okay";
};
mdio {
phy1: ethernet-phy@1 { /* Marvell 88E1512 */
reg = <1>;
};
};
ethernet@70000 {
status = "okay";
phy = <&phy1>;
@ -192,7 +186,7 @@ regulators {
pinctrl-0 = <&sata1_pwr_pin &sata2_pwr_pin>;
pinctrl-names = "default";
sata1_regulator: sata1-regulator {
sata1_regulator: sata1-regulator@1 {
compatible = "regulator-fixed";
reg = <1>;
regulator-name = "SATA1 Power";
@ -205,7 +199,7 @@ sata1_regulator: sata1-regulator {
gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>;
};
sata2_regulator: sata2-regulator {
sata2_regulator: sata2-regulator@2 {
compatible = "regulator-fixed";
reg = <2>;
regulator-name = "SATA2 Power";
@ -220,6 +214,12 @@ sata2_regulator: sata2-regulator {
};
};
&mdio {
phy1: ethernet-phy@1 { /* Marvell 88E1512 */
reg = <1>;
};
};
&pinctrl {
disk1_led_pin: disk1-led-pin {
marvell,pins = "mpp31";

39
arch/arm/boot/dts/armada-370-xp.dtsi
View File

@ -50,8 +50,6 @@
* 370 and Armada XP SoC.
*/
/include/ "skeleton64.dtsi"
#define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16))
/ {
@ -86,7 +84,7 @@ soc {
pcie-mem-aperture = <0xf8000000 0x7e00000>;
pcie-io-aperture = <0xffe00000 0x100000>;
devbus-bootcs {
devbus_bootcs: devbus-bootcs {
compatible = "marvell,mvebu-devbus";
reg = <MBUS_ID(0xf0, 0x01) 0x10400 0x8>;
ranges = <0 MBUS_ID(0x01, 0x2f) 0 0xffffffff>;
@ -96,7 +94,7 @@ devbus-bootcs {
status = "disabled";
};
devbus-cs0 {
devbus_cs0: devbus-cs0 {
compatible = "marvell,mvebu-devbus";
reg = <MBUS_ID(0xf0, 0x01) 0x10408 0x8>;
ranges = <0 MBUS_ID(0x01, 0x3e) 0 0xffffffff>;
@ -106,7 +104,7 @@ devbus-cs0 {
status = "disabled";
};
devbus-cs1 {
devbus_cs1: devbus-cs1 {
compatible = "marvell,mvebu-devbus";
reg = <MBUS_ID(0xf0, 0x01) 0x10410 0x8>;
ranges = <0 MBUS_ID(0x01, 0x3d) 0 0xffffffff>;
@ -116,7 +114,7 @@ devbus-cs1 {
status = "disabled";
};
devbus-cs2 {
devbus_cs2: devbus-cs2 {
compatible = "marvell,mvebu-devbus";
reg = <MBUS_ID(0xf0, 0x01) 0x10418 0x8>;
ranges = <0 MBUS_ID(0x01, 0x3b) 0 0xffffffff>;
@ -126,7 +124,7 @@ devbus-cs2 {
status = "disabled";
};
devbus-cs3 {
devbus_cs3: devbus-cs3 {
compatible = "marvell,mvebu-devbus";
reg = <MBUS_ID(0xf0, 0x01) 0x10420 0x8>;
ranges = <0 MBUS_ID(0x01, 0x37) 0 0xffffffff>;
@ -142,7 +140,7 @@ internal-regs {
#size-cells = <1>;
ranges = <0 MBUS_ID(0xf0, 0x01) 0 0x100000>;
rtc@10300 {
rtc: rtc@10300 {
compatible = "marvell,orion-rtc";
reg = <0x10300 0x20>;
interrupts = <50>;
@ -214,33 +212,38 @@ mpic: interrupt-controller@20a00 {
msi-controller;
};
coherency-fabric@20200 {
coherencyfab: coherency-fabric@20200 {
compatible = "marvell,coherency-fabric";
reg = <0x20200 0xb0>, <0x21010 0x1c>;
};
timer@20300 {
timer: timer@20300 {
reg = <0x20300 0x30>, <0x21040 0x30>;
interrupts = <37>, <38>, <39>, <40>, <5>, <6>;
};
watchdog@20300 {
watchdog: watchdog@20300 {
reg = <0x20300 0x34>, <0x20704 0x4>;
};
pmsu@22000 {
cpurst: cpurst@20800 {
compatible = "marvell,armada-370-cpu-reset";
reg = <0x20800 0x8>;
};
pmsu: pmsu@22000 {
compatible = "marvell,armada-370-pmsu";
reg = <0x22000 0x1000>;
};
usb@50000 {
usb0: usb@50000 {
compatible = "marvell,orion-ehci";
reg = <0x50000 0x500>;
interrupts = <45>;
status = "disabled";
};
usb@51000 {
usb1: usb@51000 {
compatible = "marvell,orion-ehci";
reg = <0x51000 0x500>;
interrupts = <46>;
@ -254,7 +257,7 @@ eth0: ethernet@70000 {
status = "disabled";
};
mdio: mdio {
mdio: mdio@72004 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "marvell,orion-mdio";
@ -269,7 +272,7 @@ eth1: ethernet@74000 {
status = "disabled";
};
sata@a0000 {
sata: sata@a0000 {
compatible = "marvell,armada-370-sata";
reg = <0xa0000 0x5000>;
interrupts = <55>;
@ -278,7 +281,7 @@ sata@a0000 {
status = "disabled";
};
nand@d0000 {
nand: nand@d0000 {
compatible = "marvell,armada370-nand";
reg = <0xd0000 0x54>;
#address-cells = <1>;
@ -288,7 +291,7 @@ nand@d0000 {
status = "disabled";
};
mvsdio@d4000 {
sdio: mvsdio@d4000 {
compatible = "marvell,orion-sdio";
reg = <0xd4000 0x200>;
interrupts = <54>;

136
arch/arm/boot/dts/armada-370.dtsi
View File

@ -50,9 +50,11 @@
*/
#include "armada-370-xp.dtsi"
/include/ "skeleton.dtsi"
/ {
#address-cells = <1>;
#size-cells = <1>;
model = "Marvell Armada 370 family SoC";
compatible = "marvell,armada370", "marvell,armada-370-xp";
@ -70,7 +72,7 @@ bootrom {
reg = <MBUS_ID(0x01, 0xe0) 0 0x100000>;
};
pcie-controller {
pciec: pcie-controller@82000000 {
compatible = "marvell,armada-370-pcie";
status = "disabled";
device_type = "pci";
@ -89,7 +91,7 @@ pcie-controller {
0x82000000 0x2 0 MBUS_ID(0x08, 0xe8) 0 1 0 /* Port 1.0 MEM */
0x81000000 0x2 0 MBUS_ID(0x08, 0xe0) 0 1 0 /* Port 1.0 IO */>;
pcie@1,0 {
pcie0: pcie@1,0 {
device_type = "pci";
assigned-addresses = <0x82000800 0 0x40000 0 0x2000>;
reg = <0x0800 0 0 0 0>;
@ -106,7 +108,7 @@ pcie@1,0 {
status = "disabled";
};
pcie@2,0 {
pcie2: pcie@2,0 {
device_type = "pci";
assigned-addresses = <0x82002800 0 0x80000 0 0x2000>;
reg = <0x1000 0 0 0 0>;
@ -125,7 +127,7 @@ pcie@2,0 {
};
internal-regs {
L2: l2-cache {
L2: l2-cache@8000 {
compatible = "marvell,aurora-outer-cache";
reg = <0x08000 0x1000>;
cache-id-part = <0x100>;
@ -134,14 +136,6 @@ L2: l2-cache {
wt-override;
};
i2c0: i2c@11000 {
reg = <0x11000 0x20>;
};
i2c1: i2c@11100 {
reg = <0x11100 0x20>;
};
gpio0: gpio@18100 {
compatible = "marvell,orion-gpio";
reg = <0x18100 0x40>;
@ -175,22 +169,8 @@ gpio2: gpio@18180 {
interrupts = <91>;
};
/*
* Default UART pinctrl setting without RTS/CTS, can
* be overwritten on board level if a different
* configuration is used.
*/
uart0: serial@12000 {
pinctrl-0 = <&uart0_pins>;
pinctrl-names = "default";
};
uart1: serial@12100 {
pinctrl-0 = <&uart1_pins>;
pinctrl-names = "default";
};
system-controller@18200 {
systemc: system-controller@18200 {
compatible = "marvell,armada-370-xp-system-controller";
reg = <0x18200 0x100>;
};
@ -208,37 +188,18 @@ coreclk: mvebu-sar@18230 {
#clock-cells = <1>;
};
thermal@18300 {
thermal: thermal@18300 {
compatible = "marvell,armada370-thermal";
reg = <0x18300 0x4
0x18304 0x4>;
status = "okay";
};
sscg@18330 {
sscg: sscg@18330 {
reg = <0x18330 0x4>;
};
interrupt-controller@20a00 {
reg = <0x20a00 0x1d0>, <0x21870 0x58>;
};
timer@20300 {
compatible = "marvell,armada-370-timer";
clocks = <&coreclk 2>;
};
watchdog@20300 {
compatible = "marvell,armada-370-wdt";
clocks = <&coreclk 2>;
};
cpurst@20800 {
compatible = "marvell,armada-370-cpu-reset";
reg = <0x20800 0x8>;
};
cpu-config@21000 {
cpuconf: cpu-config@21000 {
compatible = "marvell,armada-370-cpu-config";
reg = <0x21000 0x8>;
};
@ -253,15 +214,7 @@ audio_controller: audio-controller@30000 {
status = "disabled";
};
usb@50000 {
clocks = <&coreclk 0>;
};
usb@51000 {
clocks = <&coreclk 0>;
};
xor@60800 {
xor0: xor@60800 {
compatible = "marvell,orion-xor";
reg = <0x60800 0x100
0x60A00 0x100>;
@ -280,7 +233,7 @@ xor01 {
};
};
xor@60900 {
xor1: xor@60900 {
compatible = "marvell,orion-xor";
reg = <0x60900 0x100
0x60b00 0x100>;
@ -299,15 +252,7 @@ xor11 {
};
};
ethernet@70000 {
compatible = "marvell,armada-370-neta";
};
ethernet@74000 {
compatible = "marvell,armada-370-neta";
};
crypto@90000 {
cesa: crypto@90000 {
compatible = "marvell,armada-370-crypto";
reg = <0x90000 0x10000>;
reg-names = "regs";
@ -342,6 +287,59 @@ idle-sram@0 {
};
};
/*
* Default UART pinctrl setting without RTS/CTS, can be overwritten on
* board level if a different configuration is used.
*/
&uart0 {
pinctrl-0 = <&uart0_pins>;
pinctrl-names = "default";
};
&uart1 {
pinctrl-0 = <&uart1_pins>;
pinctrl-names = "default";
};
&i2c0 {
reg = <0x11000 0x20>;
};
&i2c1 {
reg = <0x11100 0x20>;
};
&mpic {
reg = <0x20a00 0x1d0>, <0x21870 0x58>;
};
&timer {
compatible = "marvell,armada-370-timer";
clocks = <&coreclk 2>;
};
&watchdog {
compatible = "marvell,armada-370-wdt";
clocks = <&coreclk 2>;
};
&usb0 {
clocks = <&coreclk 0>;
};
&usb1 {
clocks = <&coreclk 0>;
};
&eth0 {
compatible = "marvell,armada-370-neta";
};
&eth1 {
compatible = "marvell,armada-370-neta";
};
&pinctrl {
compatible = "marvell,mv88f6710-pinctrl";

271
arch/arm/boot/dts/armada-375-db.dts
View File

@ -58,7 +58,7 @@ chosen {
stdout-path = "serial0:115200n8";
};
memory {
memory@0 {
device_type = "memory";
reg = <0x00000000 0x40000000>; /* 1 GB */
};
@ -69,138 +69,141 @@ MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000
MBUS_ID(0x09, 0x09) 0 0xf1100000 0x10000
MBUS_ID(0x09, 0x05) 0 0xf1110000 0x10000>;
internal-regs {
spi@10600 {
pinctrl-0 = <&spi0_pins>;
pinctrl-names = "default";
/*
* SPI conflicts with NAND, so we disable it
* here, and select NAND as the enabled device
* by default.
*/
status = "disabled";
spi-flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "n25q128a13", "jedec,spi-nor";
reg = <0>; /* Chip select 0 */
spi-max-frequency = <108000000>;
};
};
i2c@11000 {
status = "okay";
clock-frequency = <100000>;
pinctrl-0 = <&i2c0_pins>;
pinctrl-names = "default";
};
i2c@11100 {
status = "okay";
clock-frequency = <100000>;
pinctrl-0 = <&i2c1_pins>;
pinctrl-names = "default";
};
serial@12000 {
status = "okay";
};
pinctrl {
sdio_st_pins: sdio-st-pins {
marvell,pins = "mpp44", "mpp45";
marvell,function = "gpio";
};
};
sata@a0000 {
status = "okay";
nr-ports = <2>;
};
nand: nand@d0000 {
pinctrl-0 = <&nand_pins>;
pinctrl-names = "default";
status = "okay";
num-cs = <1>;
marvell,nand-keep-config;
marvell,nand-enable-arbiter;
nand-on-flash-bbt;
nand-ecc-strength = <4>;
nand-ecc-step-size = <512>;
partition@0 {
label = "U-Boot";
reg = <0 0x800000>;
};
partition@800000 {
label = "Linux";
reg = <0x800000 0x800000>;
};
partition@1000000 {
label = "Filesystem";
reg = <0x1000000 0x3f000000>;
};
};
usb@54000 {
status = "okay";
};
usb3@58000 {
status = "okay";
};
mvsdio@d4000 {
pinctrl-0 = <&sdio_pins &sdio_st_pins>;
pinctrl-names = "default";
status = "okay";
cd-gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>;
wp-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
};
mdio {
phy0: ethernet-phy@0 {
reg = <0>;
};
phy3: ethernet-phy@3 {
reg = <3>;
};
};
ethernet@f0000 {
status = "okay";
eth0@c4000 {
status = "okay";
phy = <&phy0>;
phy-mode = "rgmii-id";
};
eth1@c5000 {
status = "okay";
phy = <&phy3>;
phy-mode = "gmii";
};
};
};
pcie-controller {
status = "okay";
/*
* The two PCIe units are accessible through
* standard PCIe slots on the board.
*/
pcie@1,0 {
/* Port 0, Lane 0 */
status = "okay";
};
pcie@2,0 {
/* Port 1, Lane 0 */
status = "okay";
};
};
};
};
&pciec {
status = "okay";
};
/*
* The two PCIe units are accessible through
* standard PCIe slots on the board.
*/
&pcie0 {
/* Port 0, Lane 0 */
status = "okay";
};
&pcie1 {
/* Port 1, Lane 0 */
status = "okay";
};
&spi0 {
pinctrl-0 = <&spi0_pins>;
pinctrl-names = "default";
/*
* SPI conflicts with NAND, so we disable it here, and
* select NAND as the enabled device by default.
*/
status = "disabled";
spi-flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "n25q128a13", "jedec,spi-nor";
reg = <0>; /* Chip select 0 */
spi-max-frequency = <108000000>;
};
};
&i2c0 {
status = "okay";
clock-frequency = <100000>;
pinctrl-0 = <&i2c0_pins>;
pinctrl-names = "default";
};
&i2c1 {
status = "okay";
clock-frequency = <100000>;
pinctrl-0 = <&i2c1_pins>;
pinctrl-names = "default";
};
&uart0 {
status = "okay";
};
&pinctrl {
sdio_st_pins: sdio-st-pins {
marvell,pins = "mpp44", "mpp45";
marvell,function = "gpio";
};
};
&sata {
status = "okay";
nr-ports = <2>;
};
&nand {
pinctrl-0 = <&nand_pins>;
pinctrl-names = "default";
status = "okay";
num-cs = <1>;
marvell,nand-keep-config;
marvell,nand-enable-arbiter;
nand-on-flash-bbt;
nand-ecc-strength = <4>;
nand-ecc-step-size = <512>;
partition@0 {
label = "U-Boot";
reg = <0 0x800000>;
};
partition@800000 {
label = "Linux";
reg = <0x800000 0x800000>;
};
partition@1000000 {
label = "Filesystem";
reg = <0x1000000 0x3f000000>;
};
};
&usb1 {
status = "okay";
};
&usb2 {
status = "okay";
};
&sdio {
pinctrl-0 = <&sdio_pins &sdio_st_pins>;
pinctrl-names = "default";
status = "okay";
cd-gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>;
wp-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
};
&mdio {
phy0: ethernet-phy@0 {
reg = <0>;
};
phy3: ethernet-phy@3 {
reg = <3>;
};
};
&ethernet {
status = "okay";
};
&eth0 {
status = "okay";
phy = <&phy0>;
phy-mode = "rgmii-id";
};
&eth1 {
status = "okay";
phy = <&phy3>;
phy-mode = "gmii";
};

72
arch/arm/boot/dts/armada-375.dtsi
View File

@ -45,7 +45,6 @@
* OTHER DEALINGS IN THE SOFTWARE.
*/
#include "skeleton.dtsi"
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/phy/phy.h>
@ -53,6 +52,9 @@
#define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16))
/ {
#address-cells = <1>;
#size-cells = <1>;
model = "Marvell Armada 375 family SoC";
compatible = "marvell,armada375";
@ -65,7 +67,7 @@ aliases {
};
clocks {
/* 2 GHz fixed main PLL */
/* 1 GHz fixed main PLL */
mainpll: mainpll {
compatible = "fixed-clock";
#clock-cells = <0>;
@ -84,12 +86,12 @@ cpus {
#size-cells = <0>;
enable-method = "marvell,armada-375-smp";
cpu@0 {
cpu0: cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <0>;
};
cpu@1 {
cpu1: cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <1>;
@ -115,7 +117,7 @@ bootrom {
reg = <MBUS_ID(0x01, 0x1d) 0 0x100000>;
};
devbus-bootcs {
devbus_bootcs: devbus-bootcs {
compatible = "marvell,mvebu-devbus";
reg = <MBUS_ID(0xf0, 0x01) 0x10400 0x8>;
ranges = <0 MBUS_ID(0x01, 0x2f) 0 0xffffffff>;
@ -125,7 +127,7 @@ devbus-bootcs {
status = "disabled";
};
devbus-cs0 {
devbus_cs0: devbus-cs0 {
compatible = "marvell,mvebu-devbus";
reg = <MBUS_ID(0xf0, 0x01) 0x10408 0x8>;
ranges = <0 MBUS_ID(0x01, 0x3e) 0 0xffffffff>;
@ -135,7 +137,7 @@ devbus-cs0 {
status = "disabled";
};
devbus-cs1 {
devbus_cs1: devbus-cs1 {
compatible = "marvell,mvebu-devbus";
reg = <MBUS_ID(0xf0, 0x01) 0x10410 0x8>;
ranges = <0 MBUS_ID(0x01, 0x3d) 0 0xffffffff>;
@ -145,7 +147,7 @@ devbus-cs1 {
status = "disabled";
};
devbus-cs2 {
devbus_cs2: devbus-cs2 {
compatible = "marvell,mvebu-devbus";
reg = <MBUS_ID(0xf0, 0x01) 0x10418 0x8>;
ranges = <0 MBUS_ID(0x01, 0x3b) 0 0xffffffff>;
@ -155,7 +157,7 @@ devbus-cs2 {
status = "disabled";
};
devbus-cs3 {
devbus_cs3: devbus-cs3 {
compatible = "marvell,mvebu-devbus";
reg = <MBUS_ID(0xf0, 0x01) 0x10420 0x8>;
ranges = <0 MBUS_ID(0x01, 0x37) 0 0xffffffff>;
@ -182,12 +184,12 @@ L2: cache-controller@8000 {
prefetch-data = <1>;
};
scu@c000 {
scu: scu@c000 {
compatible = "arm,cortex-a9-scu";
reg = <0xc000 0x58>;
};
timer@c600 {
timer0: timer@c600 {
compatible = "arm,cortex-a9-twd-timer";
reg = <0xc600 0x20>;
interrupts = <GIC_PPI 13 (IRQ_TYPE_EDGE_RISING | GIC_CPU_MASK_SIMPLE(2))>;
@ -203,7 +205,7 @@ gic: interrupt-controller@d000 {
<0xc100 0x100>;
};
mdio {
mdio: mdio@c0054 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "marvell,orion-mdio";
@ -212,7 +214,7 @@ mdio {
};
/* Network controller */
ethernet@f0000 {
ethernet: ethernet@f0000 {
compatible = "marvell,armada-375-pp2";
reg = <0xf0000 0xa000>, /* Packet Processor regs */
<0xc0000 0x3060>, /* LMS regs */
@ -222,20 +224,20 @@ ethernet@f0000 {
clock-names = "pp_clk", "gop_clk";
status = "disabled";
eth0: eth0@c4000 {
eth0: eth0 {
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
port-id = <0>;
status = "disabled";
};
eth1: eth1@c5000 {
eth1: eth1 {
interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
port-id = <1>;
status = "disabled";
};
};
rtc@10300 {
rtc: rtc@10300 {
compatible = "marvell,orion-rtc";
reg = <0x10300 0x20>;
interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
@ -307,7 +309,7 @@ uart1: serial@12100 {
status = "disabled";
};
pinctrl {
pinctrl: pinctrl@18000 {
compatible = "marvell,mv88f6720-pinctrl";
reg = <0x18000 0x24>;
@ -382,7 +384,7 @@ gpio2: gpio@18180 {
interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
};
system-controller@18200 {
systemc: system-controller@18200 {
compatible = "marvell,armada-375-system-controller";
reg = <0x18200 0x100>;
};
@ -415,7 +417,7 @@ mpic: interrupt-controller@20a00 {
interrupts = <GIC_PPI 15 IRQ_TYPE_LEVEL_HIGH>;
};
timer@20300 {
timer1: timer@20300 {
compatible = "marvell,armada-375-timer", "marvell,armada-370-timer";
reg = <0x20300 0x30>, <0x21040 0x30>;
interrupts-extended = <&gic GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
@ -428,24 +430,24 @@ timer@20300 {
clock-names = "nbclk", "fixed";
};
watchdog@20300 {
watchdog: watchdog@20300 {
compatible = "marvell,armada-375-wdt";
reg = <0x20300 0x34>, <0x20704 0x4>, <0x18254 0x4>;
clocks = <&coreclk 0>, <&refclk>;
clock-names = "nbclk", "fixed";
};
cpurst@20800 {
cpurst: cpurst@20800 {
compatible = "marvell,armada-370-cpu-reset";
reg = <0x20800 0x10>;
};
coherency-fabric@21010 {
coherencyfab: coherency-fabric@21010 {
compatible = "marvell,armada-375-coherency-fabric";
reg = <0x21010 0x1c>;
};
usb@50000 {
usb0: usb@50000 {
compatible = "marvell,orion-ehci";
reg = <0x50000 0x500>;
interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
@ -455,7 +457,7 @@ usb@50000 {
status = "disabled";
};
usb@54000 {
usb1: usb@54000 {
compatible = "marvell,orion-ehci";
reg = <0x54000 0x500>;
interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
@ -463,7 +465,7 @@ usb@54000 {
status = "disabled";
};
usb3@58000 {
usb2: usb3@58000 {
compatible = "marvell,armada-375-xhci";
reg = <0x58000 0x20000>,<0x5b880 0x80>;
interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
@ -473,7 +475,7 @@ usb3@58000 {
status = "disabled";
};
xor@60800 {
xor0: xor@60800 {
compatible = "marvell,orion-xor";
reg = <0x60800 0x100
0x60A00 0x100>;
@ -493,7 +495,7 @@ xor01 {
};
};
xor@60900 {
xor1: xor@60900 {
compatible = "marvell,orion-xor";
reg = <0x60900 0x100
0x60b00 0x100>;
@ -513,7 +515,7 @@ xor11 {
};
};
crypto@90000 {
cesa: crypto@90000 {
compatible = "marvell,armada-375-crypto";
reg = <0x90000 0x10000>;
reg-names = "regs";
@ -528,7 +530,7 @@ crypto@90000 {
marvell,crypto-sram-size = <0x800>;
};
sata@a0000 {
sata: sata@a0000 {
compatible = "marvell,armada-370-sata";
reg = <0xa0000 0x5000>;
interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
@ -537,7 +539,7 @@ sata@a0000 {
status = "disabled";
};
nand@d0000 {
nand: nand@d0000 {
compatible = "marvell,armada370-nand";
reg = <0xd0000 0x54>;
#address-cells = <1>;
@ -547,7 +549,7 @@ nand@d0000 {
status = "disabled";
};
mvsdio@d4000 {
sdio: mvsdio@d4000 {
compatible = "marvell,orion-sdio";
reg = <0xd4000 0x200>;
interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
@ -559,7 +561,7 @@ mvsdio@d4000 {
status = "disabled";
};
thermal@e8078 {
thermal: thermal@e8078 {
compatible = "marvell,armada375-thermal";
reg = <0xe8078 0x4>, <0xe807c 0x8>;
status = "okay";
@ -580,7 +582,7 @@ coredivclk: corediv-clock@e8250 {
};
};
pcie-controller {
pciec: pcie-controller@82000000 {
compatible = "marvell,armada-370-pcie";
status = "disabled";
device_type = "pci";
@ -599,7 +601,7 @@ pcie-controller {
0x82000000 0x2 0 MBUS_ID(0x04, 0xd8) 0 1 0 /* Port 1 MEM */
0x81000000 0x2 0 MBUS_ID(0x04, 0xd0) 0 1 0 /* Port 1 IO */>;
pcie@1,0 {
pcie0: pcie@1,0 {
device_type = "pci";
assigned-addresses = <0x82000800 0 0x40000 0 0x2000>;
reg = <0x0800 0 0 0 0>;
@ -616,7 +618,7 @@ pcie@1,0 {
status = "disabled";
};
pcie@2,0 {
pcie1: pcie@2,0 {
device_type = "pci";
assigned-addresses = <0x82000800 0 0x44000 0 0x2000>;
reg = <0x1000 0 0 0 0>;

2
arch/arm/boot/dts/armada-38x.dtsi
View File

@ -661,7 +661,7 @@ spi1: spi@10680 {
};
clocks {
/* 2 GHz fixed main PLL */
/* 1 GHz fixed main PLL */
mainpll: mainpll {
compatible = "fixed-clock";
#clock-cells = <0>;

2
arch/arm/boot/dts/armada-39x.dtsi
View File

@ -573,7 +573,7 @@ spi1: spi@10680 {
};
clocks {
/* 2 GHz fixed main PLL */
/* 1 GHz fixed main PLL */
mainpll: mainpll {
compatible = "fixed-clock";
#clock-cells = <0>;

68
arch/arm/boot/dts/armada-xp-axpwifiap.dts
View File

@ -62,7 +62,7 @@ chosen {
stdout-path = "serial0:115200n8";
};
memory {
memory@0 {
device_type = "memory";
reg = <0x00000000 0x00000000 0x00000000 0x40000000>; /* 1GB */
};
@ -73,28 +73,6 @@ MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
MBUS_ID(0x09, 0x09) 0 0 0xf1100000 0x10000
MBUS_ID(0x09, 0x05) 0 0 0xf1110000 0x10000>;
pcie-controller {
status = "okay";
/* First mini-PCIe port */
pcie@1,0 {
/* Port 0, Lane 0 */
status = "okay";
};
/* Second mini-PCIe port */
pcie@2,0 {
/* Port 0, Lane 1 */
status = "okay";
};
/* Renesas uPD720202 USB 3.0 controller */
pcie@3,0 {
/* Port 0, Lane 3 */
status = "okay";
};
};
internal-regs {
/* UART0 */
serial@12000 {
@ -111,16 +89,6 @@ sata@a0000 {
status = "okay";
};
mdio {
phy0: ethernet-phy@0 {
reg = <0>;
};
phy1: ethernet-phy@1 {
reg = <1>;
};
};
ethernet@70000 {
pinctrl-0 = <&ge0_rgmii_pins>;
pinctrl-names = "default";
@ -145,7 +113,7 @@ gpio_keys {
pinctrl-0 = <&keys_pin>;
pinctrl-names = "default";
button@1 {
reset {
label = "Factory Reset Button";
linux,code = <KEY_SETUP>;
gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
@ -153,6 +121,38 @@ button@1 {
};
};
&mdio {
phy0: ethernet-phy@0 {
reg = <0>;
};
phy1: ethernet-phy@1 {
reg = <1>;
};
};
&pciec {
status = "okay";
/* First mini-PCIe port */
pcie@1,0 {
/* Port 0, Lane 0 */
status = "okay";
};
/* Second mini-PCIe port */
pcie@2,0 {
/* Port 0, Lane 1 */
status = "okay";
};
/* Renesas uPD720202 USB 3.0 controller */
pcie@3,0 {
/* Port 0, Lane 3 */
status = "okay";
};
};
&pinctrl {
pinctrl-0 = <&phy_int_pin>;
pinctrl-names = "default";

104
arch/arm/boot/dts/armada-xp-db.dts
View File

@ -67,7 +67,7 @@ chosen {
stdout-path = "serial0:115200n8";
};
memory {
memory@0 {
device_type = "memory";
reg = <0 0x00000000 0 0x80000000>; /* 2 GB */
};
@ -108,39 +108,6 @@ nor@0 {
};
};
pcie-controller {
status = "okay";
/*
* All 6 slots are physically present as
* standard PCIe slots on the board.
*/
pcie@1,0 {
/* Port 0, Lane 0 */
status = "okay";
};
pcie@2,0 {
/* Port 0, Lane 1 */
status = "okay";
};
pcie@3,0 {
/* Port 0, Lane 2 */
status = "okay";
};
pcie@4,0 {
/* Port 0, Lane 3 */
status = "okay";
};
pcie@9,0 {
/* Port 2, Lane 0 */
status = "okay";
};
pcie@10,0 {
/* Port 3, Lane 0 */
status = "okay";
};
};
internal-regs {
serial@12000 {
status = "okay";
@ -160,24 +127,6 @@ sata@a0000 {
status = "okay";
};
mdio {
phy0: ethernet-phy@0 {
reg = <0>;
};
phy1: ethernet-phy@1 {
reg = <1>;
};
phy2: ethernet-phy@2 {
reg = <25>;
};
phy3: ethernet-phy@3 {
reg = <27>;
};
};
ethernet@70000 {
status = "okay";
phy = <&phy0>;
@ -266,6 +215,57 @@ bm-bppi {
};
};
&pciec {
status = "okay";
/*
* All 6 slots are physically present as
* standard PCIe slots on the board.
*/
pcie@1,0 {
/* Port 0, Lane 0 */
status = "okay";
};
pcie@2,0 {
/* Port 0, Lane 1 */
status = "okay";
};
pcie@3,0 {
/* Port 0, Lane 2 */
status = "okay";
};
pcie@4,0 {
/* Port 0, Lane 3 */
status = "okay";
};
pcie@9,0 {
/* Port 2, Lane 0 */
status = "okay";
};
pcie@10,0 {
/* Port 3, Lane 0 */
status = "okay";
};
};
&mdio {
phy0: ethernet-phy@0 {
reg = <0>;
};
phy1: ethernet-phy@1 {
reg = <1>;
};
phy2: ethernet-phy@2 {
reg = <25>;
};
phy3: ethernet-phy@3 {
reg = <27>;
};
};
&spi0 {
status = "okay";

80
arch/arm/boot/dts/armada-xp-gp.dts
View File

@ -68,7 +68,7 @@ chosen {
stdout-path = "serial0:115200n8";
};
memory {
memory@0 {
device_type = "memory";
/*
* 8 GB of plug-in RAM modules by default.The amount
@ -127,27 +127,6 @@ nor@0 {
};
};
pcie-controller {
status = "okay";
/*
* The 3 slots are physically present as
* standard PCIe slots on the board.
*/
pcie@1,0 {
/* Port 0, Lane 0 */
status = "okay";
};
pcie@9,0 {
/* Port 2, Lane 0 */
status = "okay";
};
pcie@10,0 {
/* Port 3, Lane 0 */
status = "okay";
};
};
internal-regs {
serial@12000 {
status = "okay";
@ -175,24 +154,6 @@ sata@a0000 {
status = "okay";
};
mdio {
phy0: ethernet-phy@0 {
reg = <16>;
};
phy1: ethernet-phy@1 {
reg = <17>;
};
phy2: ethernet-phy@2 {
reg = <18>;
};
phy3: ethernet-phy@3 {
reg = <19>;
};
};
ethernet@70000 {
status = "okay";
phy = <&phy0>;
@ -251,6 +212,45 @@ bm-bppi {
};
};
&pciec {
status = "okay";
/*
* The 3 slots are physically present as
* standard PCIe slots on the board.
*/
pcie@1,0 {
/* Port 0, Lane 0 */
status = "okay";
};
pcie@9,0 {
/* Port 2, Lane 0 */
status = "okay";
};
pcie@10,0 {
/* Port 3, Lane 0 */
status = "okay";
};
};
&mdio {
phy0: ethernet-phy@0 {
reg = <16>;
};
phy1: ethernet-phy@1 {
reg = <17>;
};
phy2: ethernet-phy@2 {
reg = <18>;
};
phy3: ethernet-phy@3 {
reg = <19>;
};
};
&spi0 {
status = "okay";

53
arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts
View File

@ -57,7 +57,7 @@ chosen {
stdout-path = "serial0:115200n8";
};
memory {
memory@0 {
device_type = "memory";
reg = <0 0x00000000 0 0x20000000>; /* 512MB */
};
@ -68,37 +68,11 @@ MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
MBUS_ID(0x09, 0x09) 0 0 0xf1100000 0x10000
MBUS_ID(0x09, 0x05) 0 0 0xf1110000 0x10000>;
pcie-controller {
status = "okay";
/* Quad port sata: Marvell 88SX7042 */
pcie@1,0 {
/* Port 0, Lane 0 */
status = "okay";
};
/* USB 3.0 xHCI controller: NEC D720200F1 */
pcie@5,0 {
/* Port 1, Lane 0 */
status = "okay";
};
};
internal-regs {
serial@12000 {
status = "okay";
};
mdio {
phy0: ethernet-phy@0 { /* Marvell 88E1318 */
reg = <0>;
};
phy1: ethernet-phy@1 { /* Marvell 88E1318 */
reg = <1>;
};
};
ethernet@70000 {
pinctrl-0 = <&ge0_rgmii_pins>;
pinctrl-names = "default";
@ -295,6 +269,31 @@ gpio-poweroff {
gpios = <&gpio0 24 GPIO_ACTIVE_HIGH>;
};
};
&pciec {
status = "okay";
/* Quad port sata: Marvell 88SX7042 */
pcie@1,0 {
/* Port 0, Lane 0 */
status = "okay";
};
/* USB 3.0 xHCI controller: NEC D720200F1 */
pcie@5,0 {
/* Port 1, Lane 0 */
status = "okay";
};
};
&mdio {
phy0: ethernet-phy@0 { /* Marvell 88E1318 */
reg = <0>;
};
phy1: ethernet-phy@1 { /* Marvell 88E1318 */
reg = <1>;
};
};
&pinctrl {
poweroff_pin: poweroff-pin {

52
arch/arm/boot/dts/armada-xp-linksys-mamba.dts
View File

@ -62,7 +62,7 @@ chosen {
stdout-path = &uart0;
};
memory {
memory@0 {
device_type = "memory";
reg = <0x00000000 0x00000000 0x00000000 0x10000000>; /* 256MB */
};
@ -73,28 +73,6 @@ MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
MBUS_ID(0x09, 0x09) 0 0 0xf1100000 0x10000
MBUS_ID(0x09, 0x05) 0 0 0xf1110000 0x10000>;
pcie-controller {
status = "okay";
/* Etron EJ168 USB 3.0 controller */
pcie@1,0 {
/* Port 0, Lane 0 */
status = "okay";
};
/* First mini-PCIe port */
pcie@2,0 {
/* Port 0, Lane 1 */
status = "okay";
};
/* Second mini-PCIe port */
pcie@3,0 {
/* Port 0, Lane 3 */
status = "okay";
};
};
internal-regs {
rtc@10300 {
@ -289,13 +267,13 @@ gpio_keys {
pinctrl-0 = <&keys_pin>;
pinctrl-names = "default";
button@1 {
wps {
label = "WPS";
linux,code = <KEY_WPS_BUTTON>;
gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
};
button@2 {
reset {
label = "Factory Reset Button";
linux,code = <KEY_RESTART>;
gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
@ -323,7 +301,7 @@ gpio_fan {
4500 1>;
};
dsa@0 {
dsa {
compatible = "marvell,dsa";
#address-cells = <2>;
#size-cells = <0>;
@ -369,6 +347,28 @@ port@5 {
};
};
&pciec {
status = "okay";
/* Etron EJ168 USB 3.0 controller */
pcie@1,0 {
/* Port 0, Lane 0 */
status = "okay";
};
/* First mini-PCIe port */
pcie@2,0 {
/* Port 0, Lane 1 */
status = "okay";
};
/* Second mini-PCIe port */
pcie@3,0 {
/* Port 0, Lane 3 */
status = "okay";
};
};
&pinctrl {
keys_pin: keys-pin {

20
arch/arm/boot/dts/armada-xp-matrix.dts
View File

@ -55,7 +55,7 @@ chosen {
stdout-path = "serial0:115200n8";
};
memory {
memory@0 {
device_type = "memory";
/*
* This board has 4 GB of RAM, but the last 256 MB of
@ -99,18 +99,18 @@ fixed-link {
};
};
pcie-controller {
status = "okay";
pcie@1,0 {
/* Port 0, Lane 0 */
status = "okay";
};
};
usb@50000 {
status = "okay";
};
};
};
};
&pciec {
status = "okay";
pcie@1,0 {
/* Port 0, Lane 0 */
status = "okay";
};
};

12
arch/arm/boot/dts/armada-xp-mv78230.dtsi
View File

@ -86,7 +86,7 @@ soc {
* configured as x4 or quad x1 lanes. One unit is
* x1 only.
*/
pcie-controller {
pciec: pcie-controller@82000000 {
compatible = "marvell,armada-xp-pcie";
status = "disabled";
device_type = "pci";
@ -114,7 +114,7 @@ pcie-controller {
0x82000000 0x5 0 MBUS_ID(0x08, 0xe8) 0 1 0 /* Port 1.0 MEM */
0x81000000 0x5 0 MBUS_ID(0x08, 0xe0) 0 1 0 /* Port 1.0 IO */>;
pcie@1,0 {
pcie1: pcie@1,0 {
device_type = "pci";
assigned-addresses = <0x82000800 0 0x40000 0 0x2000>;
reg = <0x0800 0 0 0 0>;
@ -131,7 +131,7 @@ pcie@1,0 {
status = "disabled";
};
pcie@2,0 {
pcie2: pcie@2,0 {
device_type = "pci";
assigned-addresses = <0x82000800 0 0x44000 0 0x2000>;
reg = <0x1000 0 0 0 0>;
@ -148,7 +148,7 @@ pcie@2,0 {
status = "disabled";
};
pcie@3,0 {
pcie3: pcie@3,0 {
device_type = "pci";
assigned-addresses = <0x82000800 0 0x48000 0 0x2000>;
reg = <0x1800 0 0 0 0>;
@ -165,7 +165,7 @@ pcie@3,0 {
status = "disabled";
};
pcie@4,0 {
pcie4: pcie@4,0 {
device_type = "pci";
assigned-addresses = <0x82000800 0 0x4c000 0 0x2000>;
reg = <0x2000 0 0 0 0>;
@ -182,7 +182,7 @@ pcie@4,0 {
status = "disabled";
};
pcie@5,0 {
pcie5: pcie@5,0 {
device_type = "pci";
assigned-addresses = <0x82000800 0 0x80000 0 0x2000>;
reg = <0x2800 0 0 0 0>;

20
arch/arm/boot/dts/armada-xp-mv78260.dtsi
View File

@ -87,7 +87,7 @@ soc {
* configured as x4 or quad x1 lanes. One unit is
* x4 only.
*/
pcie-controller {
pciec: pcie-controller@82000000 {
compatible = "marvell,armada-xp-pcie";
status = "disabled";
device_type = "pci";
@ -129,7 +129,7 @@ pcie-controller {
0x82000000 0x9 0 MBUS_ID(0x04, 0xf8) 0 1 0 /* Port 2.0 MEM */
0x81000000 0x9 0 MBUS_ID(0x04, 0xf0) 0 1 0 /* Port 2.0 IO */>;
pcie@1,0 {
pcie1: pcie@1,0 {
device_type = "pci";
assigned-addresses = <0x82000800 0 0x40000 0 0x2000>;
reg = <0x0800 0 0 0 0>;
@ -146,7 +146,7 @@ pcie@1,0 {
status = "disabled";
};
pcie@2,0 {
pcie2: pcie@2,0 {
device_type = "pci";
assigned-addresses = <0x82000800 0 0x44000 0 0x2000>;
reg = <0x1000 0 0 0 0>;
@ -163,7 +163,7 @@ pcie@2,0 {
status = "disabled";
};
pcie@3,0 {
pcie3: pcie@3,0 {
device_type = "pci";
assigned-addresses = <0x82000800 0 0x48000 0 0x2000>;
reg = <0x1800 0 0 0 0>;
@ -180,7 +180,7 @@ pcie@3,0 {
status = "disabled";
};
pcie@4,0 {
pcie4: pcie@4,0 {
device_type = "pci";
assigned-addresses = <0x82000800 0 0x4c000 0 0x2000>;
reg = <0x2000 0 0 0 0>;
@ -197,7 +197,7 @@ pcie@4,0 {
status = "disabled";
};
pcie@5,0 {
pcie5: pcie@5,0 {
device_type = "pci";
assigned-addresses = <0x82000800 0 0x80000 0 0x2000>;
reg = <0x2800 0 0 0 0>;
@ -214,7 +214,7 @@ pcie@5,0 {
status = "disabled";
};
pcie@6,0 {
pcie6: pcie@6,0 {
device_type = "pci";
assigned-addresses = <0x82000800 0 0x84000 0 0x2000>;
reg = <0x3000 0 0 0 0>;
@ -231,7 +231,7 @@ pcie@6,0 {
status = "disabled";
};
pcie@7,0 {
pcie7: pcie@7,0 {
device_type = "pci";
assigned-addresses = <0x82000800 0 0x88000 0 0x2000>;
reg = <0x3800 0 0 0 0>;
@ -248,7 +248,7 @@ pcie@7,0 {
status = "disabled";
};
pcie@8,0 {
pcie8: pcie@8,0 {
device_type = "pci";
assigned-addresses = <0x82000800 0 0x8c000 0 0x2000>;
reg = <0x4000 0 0 0 0>;
@ -265,7 +265,7 @@ pcie@8,0 {
status = "disabled";
};
pcie@9,0 {
pcie9: pcie@9,0 {
device_type = "pci";
assigned-addresses = <0x82000800 0 0x42000 0 0x2000>;
reg = <0x4800 0 0 0 0>;

22
arch/arm/boot/dts/armada-xp-mv78460.dtsi
View File

@ -104,7 +104,7 @@ soc {
* configured as x4 or quad x1 lanes. Two units are
* x4/x1.
*/
pcie-controller {
pciec: pcie-controller@82000000 {
compatible = "marvell,armada-xp-pcie";
status = "disabled";
device_type = "pci";
@ -150,7 +150,7 @@ pcie-controller {
0x82000000 0xa 0 MBUS_ID(0x08, 0xf8) 0 1 0 /* Port 3.0 MEM */
0x81000000 0xa 0 MBUS_ID(0x08, 0xf0) 0 1 0 /* Port 3.0 IO */>;
pcie@1,0 {
pcie1: pcie@1,0 {
device_type = "pci";
assigned-addresses = <0x82000800 0 0x40000 0 0x2000>;
reg = <0x0800 0 0 0 0>;
@ -167,7 +167,7 @@ pcie@1,0 {
status = "disabled";
};
pcie@2,0 {
pcie2: pcie@2,0 {
device_type = "pci";
assigned-addresses = <0x82001000 0 0x44000 0 0x2000>;
reg = <0x1000 0 0 0 0>;
@ -184,7 +184,7 @@ pcie@2,0 {
status = "disabled";
};
pcie@3,0 {
pcie3: pcie@3,0 {
device_type = "pci";
assigned-addresses = <0x82001800 0 0x48000 0 0x2000>;
reg = <0x1800 0 0 0 0>;
@ -201,7 +201,7 @@ pcie@3,0 {
status = "disabled";
};
pcie@4,0 {
pcie4: pcie@4,0 {
device_type = "pci";
assigned-addresses = <0x82002000 0 0x4c000 0 0x2000>;
reg = <0x2000 0 0 0 0>;
@ -218,7 +218,7 @@ pcie@4,0 {
status = "disabled";
};
pcie@5,0 {
pcie5: pcie@5,0 {
device_type = "pci";
assigned-addresses = <0x82002800 0 0x80000 0 0x2000>;
reg = <0x2800 0 0 0 0>;
@ -235,7 +235,7 @@ pcie@5,0 {
status = "disabled";
};
pcie@6,0 {
pcie6: pcie@6,0 {
device_type = "pci";
assigned-addresses = <0x82003000 0 0x84000 0 0x2000>;
reg = <0x3000 0 0 0 0>;
@ -252,7 +252,7 @@ pcie@6,0 {
status = "disabled";
};
pcie@7,0 {
pcie7: pcie@7,0 {
device_type = "pci";
assigned-addresses = <0x82003800 0 0x88000 0 0x2000>;
reg = <0x3800 0 0 0 0>;
@ -269,7 +269,7 @@ pcie@7,0 {
status = "disabled";
};
pcie@8,0 {
pcie8: pcie@8,0 {
device_type = "pci";
assigned-addresses = <0x82004000 0 0x8c000 0 0x2000>;
reg = <0x4000 0 0 0 0>;
@ -286,7 +286,7 @@ pcie@8,0 {
status = "disabled";
};
pcie@9,0 {
pcie9: pcie@9,0 {
device_type = "pci";
assigned-addresses = <0x82004800 0 0x42000 0 0x2000>;
reg = <0x4800 0 0 0 0>;
@ -303,7 +303,7 @@ pcie@9,0 {
status = "disabled";
};
pcie@10,0 {
pcie10: pcie@10,0 {
device_type = "pci";
assigned-addresses = <0x82005000 0 0x82000 0 0x2000>;
reg = <0x5000 0 0 0 0>;

74
arch/arm/boot/dts/armada-xp-netgear-rn2120.dts
View File

@ -56,7 +56,7 @@ chosen {
stdout-path = "serial0:115200n8";
};
memory {
memory@0 {
device_type = "memory";
reg = <0 0x00000000 0 0x80000000>; /* 2GB */
};
@ -67,28 +67,6 @@ MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
MBUS_ID(0x09, 0x09) 0 0 0xf1100000 0x10000
MBUS_ID(0x09, 0x05) 0 0 0xf1110000 0x10000>;
pcie-controller {
status = "okay";
/* Connected to first Marvell 88SE9170 SATA controller */
pcie@1,0 {
/* Port 0, Lane 0 */
status = "okay";
};
/* Connected to second Marvell 88SE9170 SATA controller */
pcie@2,0 {
/* Port 0, Lane 1 */
status = "okay";
};
/* Connected to Fresco Logic FL1009 USB 3.0 controller */
pcie@5,0 {
/* Port 1, Lane 0 */
status = "okay";
};
};
internal-regs {
/* RTC is provided by Intersil ISL12057 I2C RTC chip */
@ -97,7 +75,6 @@ rtc@10300 {
};
i2c@11000 {
compatible = "marvell,mv64xxx-i2c";
clock-frequency = <400000>;
status = "okay";
@ -154,23 +131,19 @@ usb@50000 {
status = "okay";
};
mdio {
phy0: ethernet-phy@0 { /* Marvell 88E1318 */
reg = <0>;
};
phy1: ethernet-phy@1 { /* Marvell 88E1318 */
reg = <1>;
};
};
ethernet@70000 {
pinctrl-0 = <&ge0_rgmii_pins>;
pinctrl-names = "default";
status = "okay";
phy = <&phy0>;
phy-mode = "rgmii-id";
};
ethernet@74000 {
pinctrl-0 = <&ge1_rgmii_pins>;
pinctrl-names = "default";
status = "okay";
phy = <&phy1>;
phy-mode = "rgmii-id";
@ -295,6 +268,39 @@ gpio-poweroff {
};
};
&pciec {
status = "okay";
/* Connected to first Marvell 88SE9170 SATA controller */
pcie@1,0 {
/* Port 0, Lane 0 */
status = "okay";
};
/* Connected to second Marvell 88SE9170 SATA controller */
pcie@2,0 {
/* Port 0, Lane 1 */
status = "okay";
};
/* Connected to Fresco Logic FL1009 USB 3.0 controller */
pcie@5,0 {
/* Port 1, Lane 0 */
status = "okay";
};
};
&mdio {
phy0: ethernet-phy@0 { /* Marvell 88E1318 */
reg = <0>;
};
phy1: ethernet-phy@1 { /* Marvell 88E1318 */
reg = <1>;
};
};
&pinctrl {
poweroff: poweroff {
marvell,pins = "mpp42";

58
arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts
View File

@ -57,7 +57,7 @@ chosen {
stdout-path = "serial0:115200n8";
};
memory {
memory@0 {
device_type = "memory";
reg = <0 0x00000000 0 0x40000000>; /* 1 GB soldered on */
};
@ -98,15 +98,6 @@ nor@0 {
};
};
pcie-controller {
status = "okay";
/* Internal mini-PCIe connector */
pcie@1,0 {
/* Port 0, Lane 0 */
status = "okay";
};
};
internal-regs {
rtc@10300 {
/* No crystal connected to the internal RTC */
@ -148,31 +139,13 @@ gpio_keys {
#address-cells = <1>;
#size-cells = <0>;
button@1 {
init {
label = "Init Button";
linux,code = <KEY_POWER>;
gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>;
};
};
mdio {
phy0: ethernet-phy@0 {
reg = <0>;
};
phy1: ethernet-phy@1 {
reg = <1>;
};
phy2: ethernet-phy@2 {
reg = <2>;
};
phy3: ethernet-phy@3 {
reg = <3>;
};
};
ethernet@70000 {
status = "okay";
phy = <&phy0>;
@ -240,6 +213,33 @@ bm-bppi {
};
};
&pciec {
status = "okay";
/* Internal mini-PCIe connector */
pcie@1,0 {
/* Port 0, Lane 0 */
status = "okay";
};
};
&mdio {
phy0: ethernet-phy@0 {
reg = <0>;
};
phy1: ethernet-phy@1 {
reg = <1>;
};
phy2: ethernet-phy@2 {
reg = <2>;
};
phy3: ethernet-phy@3 {
reg = <3>;
};
};
&pinctrl {
led_pins: led-pins-0 {
marvell,pins = "mpp49", "mpp51", "mpp53";

75
arch/arm/boot/dts/armada-xp-synology-ds414.dts
View File

@ -70,7 +70,7 @@ chosen {
stdout-path = "serial0:115200n8";
};
memory {
memory@0 {
device_type = "memory";
reg = <0 0x00000000 0 0x40000000>; /* 1GB */
};
@ -81,28 +81,6 @@ MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
MBUS_ID(0x09, 0x09) 0 0 0xf1100000 0x10000
MBUS_ID(0x09, 0x05) 0 0 0xf1110000 0x10000>;
pcie-controller {
status = "okay";
/*
* Connected to Marvell 88SX7042 SATA-II controller
* handling the four disks.
*/
pcie@1,0 {
/* Port 0, Lane 0 */
status = "okay";
};
/*
* Connected to EtronTech EJ168A XHCI controller
* providing the two rear USB 3.0 ports.
*/
pcie@5,0 {
/* Port 1, Lane 0 */
status = "okay";
};
};
internal-regs {
/* RTC is provided by Seiko S-35390A below */
@ -150,16 +128,6 @@ usb@50000 {
status = "okay";
};
mdio {
phy0: ethernet-phy@0 { /* Marvell 88E1512 */
reg = <0>;
};
phy1: ethernet-phy@1 { /* Marvell 88E1512 */
reg = <1>;
};
};
ethernet@70000 {
status = "okay";
pinctrl-0 = <&ge0_rgmii_pins>;
@ -186,7 +154,7 @@ regulators {
&sata3_pwr_pin &sata4_pwr_pin>;
pinctrl-names = "default";
sata1_regulator: sata1-regulator {
sata1_regulator: sata1-regulator@1 {
compatible = "regulator-fixed";
reg = <1>;
regulator-name = "SATA1 Power";
@ -199,7 +167,7 @@ sata1_regulator: sata1-regulator {
gpio = <&gpio1 10 GPIO_ACTIVE_HIGH>;
};
sata2_regulator: sata2-regulator {
sata2_regulator: sata2-regulator@2 {
compatible = "regulator-fixed";
reg = <2>;
regulator-name = "SATA2 Power";
@ -212,7 +180,7 @@ sata2_regulator: sata2-regulator {
gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
};
sata3_regulator: sata3-regulator {
sata3_regulator: sata3-regulator@3 {
compatible = "regulator-fixed";
reg = <3>;
regulator-name = "SATA3 Power";
@ -225,7 +193,7 @@ sata3_regulator: sata3-regulator {
gpio = <&gpio1 13 GPIO_ACTIVE_HIGH>;
};
sata4_regulator: sata4-regulator {
sata4_regulator: sata4-regulator@4 {
compatible = "regulator-fixed";
reg = <4>;
regulator-name = "SATA4 Power";
@ -240,6 +208,39 @@ sata4_regulator: sata4-regulator {
};
};
&pciec {
status = "okay";
/*
* Connected to Marvell 88SX7042 SATA-II controller
* handling the four disks.
*/
pcie@1,0 {
/* Port 0, Lane 0 */
status = "okay";
};
/*
* Connected to EtronTech EJ168A XHCI controller
* providing the two rear USB 3.0 ports.
*/
pcie@5,0 {
/* Port 1, Lane 0 */
status = "okay";
};
};
&mdio {
phy0: ethernet-phy@0 { /* Marvell 88E1512 */
reg = <0>;
};
phy1: ethernet-phy@1 { /* Marvell 88E1512 */
reg = <1>;
};
};
&pinctrl {
sata1_pwr_pin: sata1-pwr-pin {
marvell,pins = "mpp42";

94
arch/arm/boot/dts/armada-xp.dtsi
View File

@ -53,6 +53,9 @@
#include "armada-370-xp.dtsi"
/ {
#address-cells = <2>;
#size-cells = <2>;
model = "Marvell Armada XP family SoC";
compatible = "marvell,armadaxp", "marvell,armada-370-xp";
@ -75,7 +78,7 @@ sdramc@1400 {
reg = <0x1400 0x500>;
};
L2: l2-cache {
L2: l2-cache@8000 {
compatible = "marvell,aurora-system-cache";
reg = <0x08000 0x1000>;
cache-id-part = <0x100>;
@ -84,16 +87,6 @@ L2: l2-cache {
wt-override;
};
i2c0: i2c@11000 {
compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c";
reg = <0x11000 0x100>;
};
i2c1: i2c@11100 {
compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c";
reg = <0x11100 0x100>;
};
uart2: serial@12200 {
compatible = "snps,dw-apb-uart";
pinctrl-0 = <&uart2_pins>;
@ -118,7 +111,7 @@ uart3: serial@12300 {
status = "disabled";
};
system-controller@18200 {
systemc: system-controller@18200 {
compatible = "marvell,armada-370-xp-system-controller";
reg = <0x18200 0x500>;
};
@ -136,7 +129,7 @@ coreclk: mvebu-sar@18230 {
#clock-cells = <1>;
};
thermal@182b0 {
thermal: thermal@182b0 {
compatible = "marvell,armadaxp-thermal";
reg = <0x182b0 0x4
0x184d0 0x4>;
@ -150,27 +143,6 @@ cpuclk: clock-complex@18700 {
clocks = <&coreclk 1>;
};
interrupt-controller@20a00 {
reg = <0x20a00 0x2d0>, <0x21070 0x58>;
};
timer@20300 {
compatible = "marvell,armada-xp-timer";
clocks = <&coreclk 2>, <&refclk>;
clock-names = "nbclk", "fixed";
};
watchdog@20300 {
compatible = "marvell,armada-xp-wdt";
clocks = <&coreclk 2>, <&refclk>;
clock-names = "nbclk", "fixed";
};
cpurst@20800 {
compatible = "marvell,armada-370-cpu-reset";
reg = <0x20800 0x20>;
};
cpu-config@21000 {
compatible = "marvell,armada-xp-cpu-config";
reg = <0x21000 0x8>;
@ -184,15 +156,7 @@ eth2: ethernet@30000 {
status = "disabled";
};
usb@50000 {
clocks = <&gateclk 18>;
};
usb@51000 {
clocks = <&gateclk 19>;
};
usb@52000 {
usb2: usb@52000 {
compatible = "marvell,orion-ehci";
reg = <0x52000 0x500>;
interrupts = <47>;
@ -200,7 +164,7 @@ usb@52000 {
status = "disabled";
};
xor@60900 {
xor1: xor@60900 {
compatible = "marvell,orion-xor";
reg = <0x60900 0x100
0x60b00 0x100>;
@ -228,7 +192,7 @@ ethernet@74000 {
compatible = "marvell,armada-xp-neta";
};
crypto@90000 {
cesa: crypto@90000 {
compatible = "marvell,armada-xp-crypto";
reg = <0x90000 0x10000>;
reg-names = "regs";
@ -248,7 +212,7 @@ bm: bm@c0000 {
status = "disabled";
};
xor@f0900 {
xor0: xor@f0900 {
compatible = "marvell,orion-xor";
reg = <0xF0900 0x100
0xF0B00 0x100>;
@ -309,6 +273,44 @@ refclk: oscillator {
};
};
&i2c0 {
compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c";
reg = <0x11000 0x100>;
};
&i2c1 {
compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c";
reg = <0x11100 0x100>;
};
&mpic {
reg = <0x20a00 0x2d0>, <0x21070 0x58>;
};
&timer {
compatible = "marvell,armada-xp-timer";
clocks = <&coreclk 2>, <&refclk>;
clock-names = "nbclk", "fixed";
};
&watchdog {
compatible = "marvell,armada-xp-wdt";
clocks = <&coreclk 2>, <&refclk>;
clock-names = "nbclk", "fixed";
};
&cpurst {
reg = <0x20800 0x20>;
};
&usb0 {
clocks = <&gateclk 18>;
};
&usb1 {
clocks = <&gateclk 19>;
};
&pinctrl {
ge0_gmii_pins: ge0-gmii-pins {
marvell,pins =

2
arch/arm/boot/dts/kirkwood-topkick.dts
View File

@ -4,7 +4,7 @@
#include "kirkwood-6282.dtsi"
/ {
model = "Univeral Scientific Industrial Co. Topkick-1281P2";
model = "Universal Scientific Industrial Co. Topkick-1281P2";
compatible = "usi,topkick-1281P2", "usi,topkick", "marvell,kirkwood-88f6282", "marvell,kirkwood";
memory {

171
arch/arm/boot/dts/orion5x-lschl.dts Normal file
View File

@ -0,0 +1,171 @@
/*
* Device Tree file for Buffalo Linkstation LS-CHLv3
*
* Copyright (C) 2016 Ash Hughes <ashley.hughes@blueyonder.co.uk>
* Copyright (C) 2015, 2016
* Roger Shimizu <rogershimizu@gmail.com>
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This file is distributed in the hope that it will be useful
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
/dts-v1/;
#include "orion5x-linkstation.dtsi"
#include "mvebu-linkstation-gpio-simple.dtsi"
#include "mvebu-linkstation-fan.dtsi"
#include <dt-bindings/gpio/gpio.h>
/ {
model = "Buffalo Linkstation Live v3 (LS-CHL)";
compatible = "buffalo,lschl", "marvell,orion5x-88f5182", "marvell,orion5x";
memory { /* 128 MB */
device_type = "memory";
reg = <0x00000000 0x8000000>;
};
gpio_keys {
func {
label = "Function Button";
linux,code = <KEY_OPTION>;
gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
};
power-on-switch {
gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
};
power-auto-switch {
gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
};
};
gpio_leds {
pinctrl-0 = <&pmx_led_power &pmx_led_alarm &pmx_led_info &pmx_led_func>;
blue-power-led {
gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
};
red-alarm-led {
gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
};
amber-info-led {
gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
};
func {
label = "lschl:func:blue:top";
gpios = <&gpio0 17 GPIO_ACTIVE_LOW>;
};
};
gpio_fan {
gpios = <&gpio0 14 GPIO_ACTIVE_LOW
&gpio0 16 GPIO_ACTIVE_LOW>;
alarm-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;
};
};
&pinctrl {
pmx_led_power: pmx-leds {
marvell,pins = "mpp0";
marvell,function = "gpio";
};
pmx_power_hdd: pmx-power-hdd {
marvell,pins = "mpp1";
marvell,function = "gpio";
};
pmx_led_alarm: pmx-leds {
marvell,pins = "mpp2";
marvell,function = "gpio";
};
pmx_led_info: pmx-leds {
marvell,pins = "mpp3";
marvell,function = "gpio";
};
pmx_fan_lock: pmx-fan-lock {
marvell,pins = "mpp6";
marvell,function = "gpio";
};
pmx_power_switch: pmx-power-switch {
marvell,pins = "mpp8", "mpp10", "mpp15";
marvell,function = "gpio";
};
pmx_power_usb: pmx-power-usb {
marvell,pins = "mpp9";
marvell,function = "gpio";
};
pmx_fan_high: pmx-fan-high {
marvell,pins = "mpp14";
marvell,function = "gpio";
};
pmx_fan_low: pmx-fan-low {
marvell,pins = "mpp16";
marvell,function = "gpio";
};
pmx_led_func: pmx-leds {
marvell,pins = "mpp17";
marvell,function = "gpio";
};
pmx_sw_init: pmx-sw-init {
marvell,pins = "mpp7";
marvell,function = "gpio";
};
};
&hdd_power {
gpios = <&gpio0 1 GPIO_ACTIVE_HIGH>;
};
&usb_power {
gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>;
};