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arm64: dts: qcom: sdm845: Reserve LPASS clocks in gcc
[ Upstream commit 93f2a11580a9732c1d90f9e01a7e9facc825658f ] The GCC_LPASS_Q6_AXI_CLK and GCC_LPASS_SWAY_CLK clocks may not be touched on a typical UEFI based SDM845 device, but when the kernel is built with CONFIG_SDM_LPASSCC_845 this happens, unless they are marked as protected-clocks in the DT. This was done for the MTP and the Pocophone, but not for DB845c and the Lenovo Yoga C630 - causing these to fail to boot if the LPASS clock controller is enabled (which it typically isn't). Tested-by: Vinod Koul <vkoul@kernel.org> #on db845c Reviewed-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20201222001103.3112306-1-bjorn.andersson@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
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@ -415,7 +415,9 @@ &dsi0_phy {
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&gcc {
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protected-clocks = <GCC_QSPI_CORE_CLK>,
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<GCC_QSPI_CORE_CLK_SRC>,
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<GCC_QSPI_CNOC_PERIPH_AHB_CLK>;
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<GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
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<GCC_LPASS_Q6_AXI_CLK>,
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<GCC_LPASS_SWAY_CLK>;
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};
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&gpu {
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@ -245,7 +245,9 @@ &cdsp_pas {
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&gcc {
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protected-clocks = <GCC_QSPI_CORE_CLK>,
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<GCC_QSPI_CORE_CLK_SRC>,
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<GCC_QSPI_CNOC_PERIPH_AHB_CLK>;
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<GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
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<GCC_LPASS_Q6_AXI_CLK>,
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<GCC_LPASS_SWAY_CLK>;
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};
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&gpu {
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