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drm/i915/psr: report live PSR2 State

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Reports  live state of PSR2 form PSR2_STATUS register.
bit field 31:28 gives the live state of PSR2.
It can be used to check if system is in deep sleep,
selective update or selective update standby.
During video play back, we can use this to check
if system is entering SU mode or not.
when system is in idle state, DEEP_SLEEP(8) must be entered.
When video playback is happening, system must be in
SLEEP(3 / selective update) or SU_STANDBY( 6 / selective update standby)

v2: (Rodrigo)
- Remove EDP_PSR2_STATUS_TG_ON=a ,instead use ARRAY_SIZE

Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Jim Bride <jim.bride@linux.intel.com>
Signed-off-by: Vathsala Nagaraju <vathsala.nagaraju@intel.com>
Signed-off-by: Patil Deepti <deepti.patil@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1483720352-24761-1-git-send-email-vathsala.nagaraju@intel.com
This commit is contained in:
Nagaraju, Vathsala 2017-01-06 22:02:32 +05:30 committed by Rodrigo Vivi
parent 18b9bf3ee5
commit 6ba1f9e177
2 changed files with 25 additions and 0 deletions
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24
drivers/gpu/drm/i915/i915_debugfs.c
View File

@ -2633,6 +2633,30 @@ static int i915_edp_psr_status(struct seq_file *m, void *data)
seq_printf(m, "Performance_Counter: %u\n", psrperf);
}
if (dev_priv->psr.psr2_support) {
static const char * const live_status[] = {
"IDLE",
"CAPTURE",
"CAPTURE_FS",
"SLEEP",
"BUFON_FW",
"ML_UP",
"SU_STANDBY",
"FAST_SLEEP",
"DEEP_SLEEP",
"BUF_ON",
"TG_ON" };
u8 pos = (I915_READ(EDP_PSR2_STATUS_CTL) &
EDP_PSR2_STATUS_STATE_MASK) >>
EDP_PSR2_STATUS_STATE_SHIFT;
seq_printf(m, "PSR2_STATUS_EDP: %x\n",
I915_READ(EDP_PSR2_STATUS_CTL));
if (pos < ARRAY_SIZE(live_status))
seq_printf(m, "PSR2 live state %s\n",
live_status[pos]);
}
mutex_unlock(&dev_priv->psr.lock);
intel_runtime_pm_put(dev_priv);

1
drivers/gpu/drm/i915/i915_reg.h
View File

@ -3621,6 +3621,7 @@ enum {
#define EDP_PSR2_STATUS_CTL _MMIO(0x6f940)
#define EDP_PSR2_STATUS_STATE_MASK (0xf<<28)
#define EDP_PSR2_STATUS_STATE_SHIFT 28
/* VGA port control */
#define ADPA _MMIO(0x61100)