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drm/i915/bxt: fix dsi hw state pipe readout

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BXT isn't as limited as BYT and CHT regarding DSI pipes and ports.

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/8bea85b86aaf7a15f854a656bf8d3208a3afe0bd.1458070700.git.jani.nikula@intel.com
This commit is contained in:
Jani Nikula 2016-03-15 21:51:12 +02:00
parent 1dcec2f39f
commit 6b93e9c89e
2 changed files with 14 additions and 1 deletions
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1
drivers/gpu/drm/i915/i915_reg.h
View File

@ -8144,6 +8144,7 @@ enum skl_disp_power_wells {
#define READ_REQUEST_PRIORITY_HIGH (3 << 3)
#define RGB_FLIP_TO_BGR (1 << 2)
#define BXT_PIPE_SELECT_SHIFT 7
#define BXT_PIPE_SELECT_MASK (7 << 7)
#define BXT_PIPE_SELECT(pipe) ((pipe) << 7)

14
drivers/gpu/drm/i915/intel_dsi.c
View File

@ -700,7 +700,19 @@ static bool intel_dsi_get_hw_state(struct intel_encoder *encoder,
if (!(I915_READ(MIPI_DEVICE_READY(port)) & DEVICE_READY))
continue;
*pipe = port == PORT_A ? PIPE_A : PIPE_B;
if (IS_BROXTON(dev_priv)) {
u32 tmp = I915_READ(MIPI_CTRL(port));
tmp &= BXT_PIPE_SELECT_MASK;
tmp >>= BXT_PIPE_SELECT_SHIFT;
if (WARN_ON(tmp > PIPE_C))
continue;
*pipe = tmp;
} else {
*pipe = port == PORT_A ? PIPE_A : PIPE_B;
}
active = true;
break;
}