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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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drm/amd/powerplay: implement smu feature functions
each ip will support different smu feature, the driver use bitmap to management this feature. bitmap: -allowed: sw driver to enable & disable some feature when driver init. -suppored: the feature is supproed. -enabled: the feature is enabled. Signed-off-by: Kevin Wang <Kevin1.Wang@amd.com> Reviewed-by: Huang Rui <Ray.huang@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Kevin Wang
Alex Deucher
parent
f6a6b9526c
commit
6b816d7316
@ -29,6 +29,26 @@
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#include "smu_v11_0.h"
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#include "atom.h"
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int smu_feature_init_dpm(struct smu_context *smu)
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{
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struct smu_feature *feature = &smu->smu_feature;
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int ret = 0;
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uint32_t unallowed_feature_mask[SMU_FEATURE_MAX/32];
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bitmap_fill(feature->allowed, SMU_FEATURE_MAX);
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ret = smu_get_unallowed_feature_mask(smu, unallowed_feature_mask,
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SMU_FEATURE_MAX/32);
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if (ret)
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return ret;
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bitmap_andnot(feature->allowed, feature->allowed,
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(unsigned long *)unallowed_feature_mask,
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feature->feature_num);
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return ret;
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}
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static int smu_set_funcs(struct amdgpu_device *adev)
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{
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struct smu_context *smu = &adev->smu;
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@ -133,6 +153,10 @@ static int smu_sw_init(void *handle)
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return -EINVAL;
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smu->pool_size = adev->pm.smu_prv_buffer_size;
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smu->smu_feature.feature_num = SMU_FEATURE_MAX;
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bitmap_zero(smu->smu_feature.supported, SMU_FEATURE_MAX);
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bitmap_zero(smu->smu_feature.enabled, SMU_FEATURE_MAX);
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bitmap_zero(smu->smu_feature.allowed, SMU_FEATURE_MAX);
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ret = smu_init_microcode(smu);
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if (ret) {
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@ -241,6 +265,10 @@ static int smu_smc_table_hw_init(struct smu_context *smu)
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if (ret)
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return ret;
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ret = smu_feature_set_allowed_mask(smu);
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if (ret)
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return ret;
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ret = smu_read_pptable_from_vbios(smu);
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if (ret)
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return ret;
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@ -312,6 +340,10 @@ static int smu_smc_table_hw_init(struct smu_context *smu)
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if (ret)
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return ret;
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ret = smu_feature_enable_all(smu);
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if (ret)
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return ret;
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/*
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* Set min deep sleep dce fclk with bootup value from vbios via
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* SetMinDeepSleepDcefclk MSG.
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@ -413,6 +445,10 @@ static int smu_hw_init(void *handle)
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mutex_lock(&smu->mutex);
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ret = smu_feature_init_dpm(smu);
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if (ret)
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goto failed;
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ret = smu_smc_table_hw_init(smu);
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if (ret)
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goto failed;
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@ -175,6 +175,16 @@ struct smu_power_context {
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uint32_t power_context_size;
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};
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#define SMU_FEATURE_MAX (64)
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struct smu_feature
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{
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uint32_t feature_num;
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DECLARE_BITMAP(supported, SMU_FEATURE_MAX);
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DECLARE_BITMAP(allowed, SMU_FEATURE_MAX);
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DECLARE_BITMAP(enabled, SMU_FEATURE_MAX);
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};
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struct smu_context
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{
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struct amdgpu_device *adev;
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@ -187,6 +197,7 @@ struct smu_context
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struct smu_table_context smu_table;
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struct smu_dpm_context smu_dpm;
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struct smu_power_context smu_power;
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struct smu_feature smu_feature;
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};
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struct pptable_funcs {
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@ -196,6 +207,7 @@ struct pptable_funcs {
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int (*append_powerplay_table)(struct smu_context *smu);
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int (*get_smu_msg_index)(struct smu_context *smu, uint32_t index);
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int (*run_afll_btc)(struct smu_context *smu);
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int (*get_unallowed_feature_mask)(struct smu_context *smu, uint32_t *feature_mask, uint32_t num);
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};
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struct smu_funcs
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@ -225,6 +237,10 @@ struct smu_funcs
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int (*send_smc_msg_with_param)(struct smu_context *smu, uint16_t msg, uint32_t param);
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int (*read_smc_arg)(struct smu_context *smu, uint32_t *arg);
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int (*init_display)(struct smu_context *smu);
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int (*set_allowed_mask)(struct smu_context *smu);
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int (*get_enabled_mask)(struct smu_context *smu, uint32_t *feature_mask, uint32_t num);
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int (*enable_all_mask)(struct smu_context *smu);
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int (*disable_all_mask)(struct smu_context *smu);
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};
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@ -280,7 +296,14 @@ struct smu_funcs
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((smu)->ppt_funcs->alloc_dpm_context ? (smu)->ppt_funcs->alloc_dpm_context((smu)) : 0)
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#define smu_init_display(smu) \
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((smu)->funcs->init_display ? (smu)->funcs->init_display((smu)) : 0)
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#define smu_feature_set_allowed_mask(smu) \
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((smu)->funcs->set_allowed_mask? (smu)->funcs->set_allowed_mask((smu)) : 0)
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#define smu_feature_get_enabled_mask(smu, mask, num) \
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((smu)->funcs->get_enabled_mask? (smu)->funcs->get_enabled_mask((smu), (mask), (num)) : 0)
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#define smu_feature_enable_all(smu) \
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((smu)->funcs->enable_all_mask? (smu)->funcs->enable_all_mask((smu)) : 0)
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#define smu_feature_disable_all(smu) \
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((smu)->funcs->disable_all_mask? (smu)->funcs->disable_all_mask((smu)) : 0)
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#define smu_store_powerplay_table(smu) \
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((smu)->ppt_funcs->store_powerplay_table ? (smu)->ppt_funcs->store_powerplay_table((smu)) : 0)
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#define smu_check_powerplay_table(smu) \
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@ -292,6 +315,8 @@ struct smu_funcs
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((smu)->ppt_funcs? ((smu)->ppt_funcs->get_smu_msg_index? (smu)->ppt_funcs->get_smu_msg_index((smu), (msg)) : -EINVAL) : -EINVAL)
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#define smu_run_afll_btc(smu) \
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((smu)->ppt_funcs? ((smu)->ppt_funcs->run_afll_btc? (smu)->ppt_funcs->run_afll_btc((smu)) : 0) : 0)
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#define smu_get_unallowed_feature_mask(smu, feature_mask, num) \
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((smu)->ppt_funcs? ((smu)->ppt_funcs->get_unallowed_feature_mask? (smu)->ppt_funcs->get_unallowed_feature_mask((smu), (feature_mask), (num)) : 0) : 0)
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extern int smu_get_atom_data_table(struct smu_context *smu, uint32_t table,
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uint16_t *size, uint8_t *frev, uint8_t *crev,
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@ -300,5 +325,6 @@ extern int smu_get_atom_data_table(struct smu_context *smu, uint32_t table,
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extern const struct amd_ip_funcs smu_ip_funcs;
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extern const struct amdgpu_ip_block_version smu_v11_0_ip_block;
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extern int smu_feature_init_dpm(struct smu_context *smu);
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#endif
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@ -665,6 +665,101 @@ static int smu_v11_0_init_display(struct smu_context *smu)
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return ret;
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}
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static int smu_v11_0_set_allowed_mask(struct smu_context *smu)
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{
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struct smu_feature *feature = &smu->smu_feature;
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int ret = 0;
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uint32_t feature_mask[2];
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if (bitmap_empty(feature->allowed, SMU_FEATURE_MAX) || feature->feature_num < 64)
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return -EINVAL;
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bitmap_copy((unsigned long *)feature_mask, feature->allowed, 64);
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ret = smu_send_smc_msg_with_param(smu, SMU_MSG_SetAllowedFeaturesMaskHigh,
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feature_mask[1]);
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if (ret)
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return ret;
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ret = smu_send_smc_msg_with_param(smu, SMU_MSG_SetAllowedFeaturesMaskLow,
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feature_mask[0]);
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if (ret)
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return ret;
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return ret;
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}
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static int smu_v11_0_get_enabled_mask(struct smu_context *smu,
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uint32_t *feature_mask, uint32_t num)
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{
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uint32_t feature_mask_high = 0, feature_mask_low = 0;
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int ret = 0;
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if (!feature_mask || num < 2)
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return -EINVAL;
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ret = smu_send_smc_msg(smu, SMU_MSG_GetEnabledSmuFeaturesHigh);
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if (ret)
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return ret;
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ret = smu_read_smc_arg(smu, &feature_mask_high);
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if (ret)
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return ret;
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ret = smu_send_smc_msg(smu, SMU_MSG_GetEnabledSmuFeaturesLow);
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if (ret)
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return ret;
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ret = smu_read_smc_arg(smu, &feature_mask_low);
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if (ret)
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return ret;
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feature_mask[0] = feature_mask_low;
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feature_mask[1] = feature_mask_high;
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return ret;
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}
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static int smu_v11_0_enable_all_mask(struct smu_context *smu)
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{
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struct smu_feature *feature = &smu->smu_feature;
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uint32_t feature_mask[2];
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int ret = 0;
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ret = smu_send_smc_msg(smu, SMU_MSG_EnableAllSmuFeatures);
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if (ret)
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return ret;
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ret = smu_feature_get_enabled_mask(smu, feature_mask, 2);
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if (ret)
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return ret;
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bitmap_copy(feature->enabled, (unsigned long *)&feature_mask,
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feature->feature_num);
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bitmap_copy(feature->supported, (unsigned long *)&feature_mask,
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feature->feature_num);
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return ret;
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}
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static int smu_v11_0_disable_all_mask(struct smu_context *smu)
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{
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struct smu_feature *feature = &smu->smu_feature;
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uint32_t feature_mask[2];
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int ret = 0;
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ret = smu_send_smc_msg(smu, SMU_MSG_DisableAllSmuFeatures);
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if (ret)
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return ret;
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ret = smu_feature_get_enabled_mask(smu, feature_mask, 2);
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if (ret)
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return ret;
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bitmap_copy(feature->enabled, (unsigned long *)&feature_mask,
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feature->feature_num);
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bitmap_copy(feature->supported, (unsigned long *)&feature_mask,
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feature->feature_num);
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return ret;
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}
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static const struct smu_funcs smu_v11_0_funcs = {
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.init_microcode = smu_v11_0_init_microcode,
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.load_microcode = smu_v11_0_load_microcode,
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@ -688,6 +783,10 @@ static const struct smu_funcs smu_v11_0_funcs = {
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.set_min_dcef_deep_sleep = smu_v11_0_set_min_dcef_deep_sleep,
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.set_tool_table_location = smu_v11_0_set_tool_table_location,
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.init_display = smu_v11_0_init_display,
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.set_allowed_mask = smu_v11_0_set_allowed_mask,
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.get_enabled_mask = smu_v11_0_get_enabled_mask,
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.enable_all_mask = smu_v11_0_enable_all_mask,
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.disable_all_mask = smu_v11_0_disable_all_mask,
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};
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void smu_v11_0_set_smu_funcs(struct smu_context *smu)
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@ -278,6 +278,19 @@ static int vega20_run_btc_afll(struct smu_context *smu)
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return smu_send_smc_msg(smu, SMU_MSG_RunAfllBtc);
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}
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static int
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vega20_get_unallowed_feature_mask(struct smu_context *smu,
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uint32_t *feature_mask, uint32_t num)
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{
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if (num > 2)
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return -EINVAL;
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feature_mask[0] = 0xE0041C00;
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feature_mask[1] = 0xFFFFFFFE; /* bit32~bit63 is Unsupported */
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return 0;
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}
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static const struct pptable_funcs vega20_ppt_funcs = {
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.alloc_dpm_context = vega20_allocate_dpm_context,
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.store_powerplay_table = vega20_store_powerplay_table,
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@ -285,6 +298,7 @@ static const struct pptable_funcs vega20_ppt_funcs = {
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.append_powerplay_table = vega20_append_powerplay_table,
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.get_smu_msg_index = vega20_get_smu_msg_index,
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.run_afll_btc = vega20_run_btc_afll,
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.get_unallowed_feature_mask = vega20_get_unallowed_feature_mask,
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};
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void vega20_set_ppt_funcs(struct smu_context *smu)
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